lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 20 Dec 2018 12:11:50 +0100
From:   Steen Hegelund <steen.hegelund@...rochip.com>
To:     Andrew Lunn <andrew@...n.ch>
CC:     <netdev@...r.kernel.org>
Subject: Re: [PATCH net] mscc: Register poll timeout should be wall time not
 attempts

The 12/20/2018 11:31, Andrew Lunn wrote:
> On Thu, Dec 20, 2018 at 10:08:16AM +0100, Steen Hegelund wrote:
> > When doing indirect access in the Ocelot chip, a command is setup,
> > issued and then we need to poll until the result is ready. The polling
> > timeout is specified in milliseconds in the datasheet and not in
> > register access attempts.
> > 
> > Signed-off-by: Steen Hegelund <steen.hegelund@...rochip.com>
> 
> Hi Steen
> 
> Have you seen real issues with this code? You have marked this for
> net, indicating it is a bug fix. If it is a real fix, please provide a
> fixes: tag.
> 
> Thanks
> 	Andrew

Hi Andrew,

It is not a bug on the currently supported platform, but we observed
that the code does not work properly on other platforms that we want to
support as the timing requirements there are different.  So maybe this
is rather an improvement than a fix...

Should this rather go to net-next?

-- 
BR
Steen

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ