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Date:   Sat, 09 Feb 2019 09:34:36 -0800 (PST)
From:   David Miller <davem@...emloft.net>
To:     rmk+kernel@...linux.org.uk
Cc:     antoine.tenart@...tlin.com, maxime.chevallier@...tlin.com,
        baruch@...s.co.il, sven.auhagen@...eatech.de,
        netdev@...r.kernel.org
Subject: Re: [PATCH net-next] net: marvell: mvpp2: clear flow control modes
 in 10G mode

From: Russell King <rmk+kernel@...linux.org.uk>
Date: Sat, 09 Feb 2019 16:06:51 +0000

> When mvpp2 configures the flow control modes in mvpp2_xlg_config() for
> 10G mode, it only ever set the flow control enable bits.  There is no
> mechanism to clear these bits, which means that userspace is unable to
> use standard APIs to disable flow control (the only way is to poke the
> register directly.)
> 
> Fix the missing bit clearance to allow flow control to be disabled.
> This means that, by default, as there is no negotiation in 10G modes
> with mvpp2, flow control is now disabled rather than being rx-only.
> 
> Signed-off-by: Russell King <rmk+kernel@...linux.org.uk>

Applied.

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