netdev - Re: [PATCH v1 net-next 3/3] net: dsa: microchip: add KSZ9893 switch support

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Message-ID: <25f37c1f-42ba-4b61-bbb4-3990e9bd257b@gmail.com>
Date:   Thu, 28 Feb 2019 20:23:08 -0800
From:   Florian Fainelli <f.fainelli@...il.com>
To:     Tristram.Ha@...rochip.com, Andrew Lunn <andrew@...n.ch>,
        Pavel Machek <pavel@....cz>
Cc:     UNGLinuxDriver@...rochip.com, netdev@...r.kernel.org
Subject: Re: [PATCH v1 net-next 3/3] net: dsa: microchip: add KSZ9893 switch
 support



On 2/28/2019 7:57 PM, Tristram.Ha@...rochip.com wrote:
> From: Tristram Ha <Tristram.Ha@...rochip.com>
> 
> Add KSZ9893 switch support in KSZ9477 driver.  This switch is similar to
> KSZ9477 except the ingress tail tag has 1 byte instead of 2 bytes, so
> KSZ9893 tagging will be used.
> 
> The XMII register that governs how the host port communicates with the
> MAC also has different register definitions.

Looks good, just one question below.

> 
> Signed-off-by: Tristram Ha <Tristram.Ha@...rochip.com>
> ---

[snip]

>  static int ksz9477_phy_read16(struct dsa_switch *ds, int addr, int reg)
> @@ -389,6 +399,10 @@ static int ksz9477_phy_write16(struct dsa_switch *ds, int addr, int reg,
>  	/* No real PHY after this. */
>  	if (addr >= dev->phy_port_cnt)
>  		return 0;
> +
> +	/* No gigabit support.  Do not write to this register. */
> +	if (!(dev->features & GBIT_SUPPORT) && reg == MII_CTRL1000)
> +		return 0;

There should not be any reasons to write to this register if the
linkmode capabilities are correctly reflected which you do take care of,
did you find PHYLIB writing to that register?
-- 
Florian