netdev - Re: [patch net-next 00/12] net: expose switch ID via devlink

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Message-ID: <20190329145728.72e5a07b@cakuba.netronome.com>
Date:   Fri, 29 Mar 2019 14:57:28 -0700
From:   Jakub Kicinski <jakub.kicinski@...ronome.com>
To:     Florian Fainelli <f.fainelli@...il.com>
Cc:     Jiri Pirko <jiri@...nulli.us>, netdev@...r.kernel.org,
        davem@...emloft.net, mlxsw@...lanox.com, idosch@...lanox.com,
        andrew@...n.ch, vivien.didelot@...il.com, michael.chan@...adcom.com
Subject: Re: [patch net-next 00/12] net: expose switch ID via devlink

On Fri, 29 Mar 2019 14:29:11 -0700, Florian Fainelli wrote:
> > Out of curiosity, what are the shared features?  It seems mlx5 drives 
> > a lot of our API design, it'd be good if the community had a better
> > understanding of it.
> > 
> > The situation with pipelined devices is somewhat murky.  Didn't Or add
> > some from of PCIe-side looped queue to forward between PFs?
> > 
> > Presumably DSA would lean the opposite way with multiple ASICs
> > reporting the same ID?  
> 
> If you have multiple switches inter connected between each other to use
> the "D" in DSA and form a fabric of switches, then you would expect each
> port to be physically tied to a particular switch device/instance,
> because, but how they will report the switch physical ID can be of the form:
> 
> <fabric>.<switch>
> 
> where fabric is dst->index and switch is ds->index (the switch within
> the fabric).

Oh, I assumed you'd want the to all have the same switchid, and then
the "D" in DSA logic makes sure the flooding etc. works across the
ASICs..