netdev - Re: [PATCH bpf] selftests: bpf: add zero extend checks for ALU32 and/or/xor

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Message-ID: <CAH3MdRWGeYZDCEPrw2HFpnq+8j+ehMj2uhNJS9HnFDw=LmK6PQ@mail.gmail.com>
Date:   Wed, 22 May 2019 11:13:08 -0700
From:   Y Song <ys114321@...il.com>
To:     Björn Töpel <bjorn.topel@...il.com>
Cc:     Daniel Borkmann <daniel@...earbox.net>,
        Alexei Starovoitov <ast@...nel.org>,
        netdev <netdev@...r.kernel.org>, bpf <bpf@...r.kernel.org>
Subject: Re: [PATCH bpf] selftests: bpf: add zero extend checks for ALU32 and/or/xor

On Wed, May 22, 2019 at 2:25 AM Björn Töpel <bjorn.topel@...il.com> wrote:
>
> Add three tests to test_verifier/basic_instr that make sure that the
> high 32-bits of the destination register is cleared after an ALU32
> and/or/xor.
>
> Signed-off-by: Björn Töpel <bjorn.topel@...il.com>

I think the patch intends for bpf-next, right? The patch itself looks
good to me.
Acked-by: Yonghong Song <yhs@...com>

> ---
>  .../selftests/bpf/verifier/basic_instr.c      | 39 +++++++++++++++++++
>  1 file changed, 39 insertions(+)
>
> diff --git a/tools/testing/selftests/bpf/verifier/basic_instr.c b/tools/testing/selftests/bpf/verifier/basic_instr.c
> index ed91a7b9a456..4d844089938e 100644
> --- a/tools/testing/selftests/bpf/verifier/basic_instr.c
> +++ b/tools/testing/selftests/bpf/verifier/basic_instr.c
> @@ -132,3 +132,42 @@
>         .prog_type = BPF_PROG_TYPE_SCHED_CLS,
>         .result = ACCEPT,
>  },
> +{
> +       "and32 reg zero extend check",
> +       .insns = {
> +       BPF_MOV64_IMM(BPF_REG_0, -1),
> +       BPF_MOV64_IMM(BPF_REG_2, -2),
> +       BPF_ALU32_REG(BPF_AND, BPF_REG_0, BPF_REG_2),
> +       BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
> +       BPF_EXIT_INSN(),
> +       },
> +       .prog_type = BPF_PROG_TYPE_SCHED_CLS,
> +       .result = ACCEPT,
> +       .retval = 0,
> +},
> +{
> +       "or32 reg zero extend check",
> +       .insns = {
> +       BPF_MOV64_IMM(BPF_REG_0, -1),
> +       BPF_MOV64_IMM(BPF_REG_2, -2),
> +       BPF_ALU32_REG(BPF_OR, BPF_REG_0, BPF_REG_2),
> +       BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
> +       BPF_EXIT_INSN(),
> +       },
> +       .prog_type = BPF_PROG_TYPE_SCHED_CLS,
> +       .result = ACCEPT,
> +       .retval = 0,
> +},
> +{
> +       "xor32 reg zero extend check",
> +       .insns = {
> +       BPF_MOV64_IMM(BPF_REG_0, -1),
> +       BPF_MOV64_IMM(BPF_REG_2, 0),
> +       BPF_ALU32_REG(BPF_XOR, BPF_REG_0, BPF_REG_2),
> +       BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
> +       BPF_EXIT_INSN(),
> +       },
> +       .prog_type = BPF_PROG_TYPE_SCHED_CLS,
> +       .result = ACCEPT,
> +       .retval = 0,
> +},
> --
> 2.20.1
>