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Message-Id: <20190522092323.17435-1-bjorn.topel@gmail.com>
Date: Wed, 22 May 2019 11:23:23 +0200
From: Björn Töpel <bjorn.topel@...il.com>
To: daniel@...earbox.net, ast@...nel.org, netdev@...r.kernel.org
Cc: Björn Töpel <bjorn.topel@...il.com>,
bpf@...r.kernel.org
Subject: [PATCH bpf] selftests: bpf: add zero extend checks for ALU32 and/or/xor
Add three tests to test_verifier/basic_instr that make sure that the
high 32-bits of the destination register is cleared after an ALU32
and/or/xor.
Signed-off-by: Björn Töpel <bjorn.topel@...il.com>
---
.../selftests/bpf/verifier/basic_instr.c | 39 +++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/tools/testing/selftests/bpf/verifier/basic_instr.c b/tools/testing/selftests/bpf/verifier/basic_instr.c
index ed91a7b9a456..4d844089938e 100644
--- a/tools/testing/selftests/bpf/verifier/basic_instr.c
+++ b/tools/testing/selftests/bpf/verifier/basic_instr.c
@@ -132,3 +132,42 @@
.prog_type = BPF_PROG_TYPE_SCHED_CLS,
.result = ACCEPT,
},
+{
+ "and32 reg zero extend check",
+ .insns = {
+ BPF_MOV64_IMM(BPF_REG_0, -1),
+ BPF_MOV64_IMM(BPF_REG_2, -2),
+ BPF_ALU32_REG(BPF_AND, BPF_REG_0, BPF_REG_2),
+ BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
+ BPF_EXIT_INSN(),
+ },
+ .prog_type = BPF_PROG_TYPE_SCHED_CLS,
+ .result = ACCEPT,
+ .retval = 0,
+},
+{
+ "or32 reg zero extend check",
+ .insns = {
+ BPF_MOV64_IMM(BPF_REG_0, -1),
+ BPF_MOV64_IMM(BPF_REG_2, -2),
+ BPF_ALU32_REG(BPF_OR, BPF_REG_0, BPF_REG_2),
+ BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
+ BPF_EXIT_INSN(),
+ },
+ .prog_type = BPF_PROG_TYPE_SCHED_CLS,
+ .result = ACCEPT,
+ .retval = 0,
+},
+{
+ "xor32 reg zero extend check",
+ .insns = {
+ BPF_MOV64_IMM(BPF_REG_0, -1),
+ BPF_MOV64_IMM(BPF_REG_2, 0),
+ BPF_ALU32_REG(BPF_XOR, BPF_REG_0, BPF_REG_2),
+ BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
+ BPF_EXIT_INSN(),
+ },
+ .prog_type = BPF_PROG_TYPE_SCHED_CLS,
+ .result = ACCEPT,
+ .retval = 0,
+},
--
2.20.1
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