[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <BYAPR12MB3269D85EA4B012B71E896900D3FA0@BYAPR12MB3269.namprd12.prod.outlook.com>
Date: Thu, 4 Jul 2019 15:27:16 +0000
From: Jose Abreu <Jose.Abreu@...opsys.com>
To: Andrew Lunn <andrew@...n.ch>,
"Voon, Weifeng" <weifeng.voon@...el.com>
CC: "David S. Miller" <davem@...emloft.net>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Giuseppe Cavallaro <peppe.cavallaro@...com>,
Florian Fainelli <f.fainelli@...il.com>,
Alexandre Torgue <alexandre.torgue@...com>,
biao huang <biao.huang@...iatek.com>,
"Ong, Boon Leong" <boon.leong.ong@...el.com>,
"Kweh, Hock Leong" <hock.leong.kweh@...el.com>
Subject: RE: [PATCH v1 net-next] net: stmmac: enable clause 45 mdio support
From: Andrew Lunn <andrew@...n.ch>
> Yes, that is all clear. The stmmac_mdio_c45_setup() does part of this
> setup. There is also a write to mii_address which i snipped out when
> replying. But why do you need to write to the data registers during a
> read? C22 does not need this write. Are there some bits in the top of
> the data register which are relevant to C45?
Yes. The register is 32bits. 16 lower bits are for data and remaining
for C45 register address.
Powered by blists - more mailing lists