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Message-ID: <CALzJLG--k3z2HuV09tivJuOtU-BFAyCEV1vJbPqYX+OyskggmQ@mail.gmail.com>
Date:   Thu, 4 Jul 2019 13:21:04 -0400
From:   Saeed Mahameed <saeedm@....mellanox.co.il>
To:     Leon Romanovsky <leon@...nel.org>
Cc:     Saeed Mahameed <saeedm@...lanox.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-rdma@...r.kernel.org" <linux-rdma@...r.kernel.org>,
        Eran Ben Elisha <eranbe@...lanox.com>,
        Tariq Toukan <tariqt@...lanox.com>
Subject: Re: [PATCH mlx5-next 4/5] net/mlx5: Introduce TLS TX offload hardware
 bits and structures

On Thu, Jul 4, 2019 at 1:15 PM Leon Romanovsky <leon@...nel.org> wrote:
>
> On Thu, Jul 04, 2019 at 01:06:58PM -0400, Saeed Mahameed wrote:
> > On Wed, Jul 3, 2019 at 5:27 AM <leon@...nel.org> wrote:
> > >
> > > On Wed, Jul 03, 2019 at 07:39:32AM +0000, Saeed Mahameed wrote:
> > > > From: Eran Ben Elisha <eranbe@...lanox.com>
> > > >
> > > > Add TLS offload related IFC structs, layouts and enumerations.
> > > >
> > > > Signed-off-by: Eran Ben Elisha <eranbe@...lanox.com>
> > > > Signed-off-by: Tariq Toukan <tariqt@...lanox.com>
> > > > Signed-off-by: Saeed Mahameed <saeedm@...lanox.com>
> > > > ---
> > > >  include/linux/mlx5/device.h   |  14 +++++
> > > >  include/linux/mlx5/mlx5_ifc.h | 104 ++++++++++++++++++++++++++++++++--
> > > >  2 files changed, 114 insertions(+), 4 deletions(-)
> > >
> > > <...>
> > >
> > > > @@ -2725,7 +2739,8 @@ struct mlx5_ifc_traffic_counter_bits {
> > > >
> > > >  struct mlx5_ifc_tisc_bits {
> > > >       u8         strict_lag_tx_port_affinity[0x1];
> > > > -     u8         reserved_at_1[0x3];
> > > > +     u8         tls_en[0x1];
> > > > +     u8         reserved_at_1[0x2];
> > >
> > > It should be reserved_at_2.
> > >
> >
> > it should be at_1.
>
> Why? See mlx5_ifc_flow_table_prop_layout_bits, mlx5_ifc_roce_cap_bits, e.t.c.
>

they are all at_1 .. so i don't really understand what you want from me,
Leon the code is good, please double check you comments..

> Thanks
>
> >
> > > Thanks

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