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Message-ID: <BN8PR12MB3266F021DFC2C61CDEC83418D3B60@BN8PR12MB3266.namprd12.prod.outlook.com>
Date:   Tue, 10 Sep 2019 08:35:05 +0000
From:   Jose Abreu <Jose.Abreu@...opsys.com>
To:     Thierry Reding <thierry.reding@...il.com>,
        Jose Abreu <Jose.Abreu@...opsys.com>
CC:     "David S . Miller" <davem@...emloft.net>,
        Giuseppe Cavallaro <peppe.cavallaro@...com>,
        Alexandre Torgue <alexandre.torgue@...com>,
        "Jon Hunter" <jonathanh@...dia.com>,
        Bitan Biswas <bbiswas@...dia.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>
Subject: RE: [PATCH net-next v2 2/2] net: stmmac: Support enhanced addressing
 mode for DWMAC 4.10

From: Thierry Reding <thierry.reding@...il.com>
Date: Sep/09/2019, 20:13:29 (UTC+00:00)

> On Mon, Sep 09, 2019 at 04:05:52PM +0000, Jose Abreu wrote:
> > From: Thierry Reding <thierry.reding@...il.com>
> > Date: Sep/09/2019, 16:25:46 (UTC+00:00)
> > 
> > > @@ -79,6 +79,10 @@ static void dwmac4_dma_init_rx_chan(void __iomem *ioaddr,
> > >  	value = value | (rxpbl << DMA_BUS_MODE_RPBL_SHIFT);
> > >  	writel(value, ioaddr + DMA_CHAN_RX_CONTROL(chan));
> > >  
> > > +	if (dma_cfg->eame)
> > 
> > There is no need for this check. If EAME is not enabled then upper 32 
> > bits will be zero.
> 
> The idea here was to potentially guard against this register not being
> available on some revisions. Having the check here would avoid access to
> the register if the device doesn't support enhanced addressing.

I see your point but I don't think there will be any problems unless you 
have some strange system that doesn't handle the write accesses to 
unimplemented features properly ...

---
Thanks,
Jose Miguel Abreu

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