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Message-ID: <E84DB6A8-AB7F-428C-8A90-46A7A982D4BF@cisco.com>
Date: Tue, 12 Nov 2019 16:55:44 +0000
From: "HEMANT RAMDASI (hramdasi)" <hramdasi@...co.com>
To: "Daniel Walker (danielwa)" <danielwa@...co.com>,
Claudiu Manoil <claudiu.manoil@....com>
CC: "David S . Miller" <davem@...emloft.net>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"Sathish Jarugumalli -X (sjarugum - ARICENT TECHNOLOGIES HOLDINGS
LIMITED at Cisco)" <sjarugum@...co.com>
Subject: Re: [PATCH net] gianfar: Don't force RGMII mode after reset, use
defaults
> Reported-by: Daniel Walker <danielwa@...co.com>
> Signed-off-by: Claudiu Manoil <claudiu.manoil@....com>
> ---
> drivers/net/ethernet/freescale/gianfar.c | 3 ++-
> drivers/net/ethernet/freescale/gianfar.h | 2 +-
> 2 files changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c
> index 51ad864..0f4d13d 100644
> --- a/drivers/net/ethernet/freescale/gianfar.c
> +++ b/drivers/net/ethernet/freescale/gianfar.c
> @@ -3173,7 +3173,8 @@ void gfar_mac_reset(struct gfar_private *priv)
> gfar_write(®s->minflr, MINFLR_INIT_SETTINGS);
>
> /* Initialize MACCFG2. */
> - tempval = MACCFG2_INIT_SETTINGS;
> + tempval = gfar_read(®s->maccfg2);
> + tempval |= MACCFG2_PAD_CRC;
This is not in sync with PAD/CRC definition of maccfg2 mentioned in p202 rm.
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