netdev - Re: [PATCH net] gianfar: Don't force RGMII mode after reset, use defaults

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Message-ID: <873EB68B-47CB-44D6-80BD-48DD3F65683B@cisco.com>
Date:   Tue, 12 Nov 2019 17:28:04 +0000
From:   "HEMANT RAMDASI (hramdasi)" <hramdasi@...co.com>
To:     Claudiu Manoil <claudiu.manoil@....com>,
        "Daniel Walker (danielwa)" <danielwa@...co.com>
CC:     "David S . Miller" <davem@...emloft.net>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "Sathish Jarugumalli -X (sjarugum - ARICENT TECHNOLOGIES HOLDINGS
        LIMITED at Cisco)" <sjarugum@...co.com>
Subject: Re: [PATCH net] gianfar: Don't force RGMII mode after reset, use
 defaults

    >
    >This is not in sync with PAD/CRC definition of maccfg2 mentioned in p202 rm.
    >
    
    > I don know what you mean.  The definition of this bit is:
    > " Pad and append CRC . This bit is cleared by default.
    > This bit must be set when in half-duplex mode (MACCFG2[Full_Duplex] is cleared).

Should the bit be clear when in full duplex or it does not matter?   

    > 0 Frames presented to the MAC have a valid length and contain a CRC.
    > 1 The MAC pads all transmitted short frames and appends a CRC to every frame regardless of padding
    > requirement."
    
    > So the driver sets this bit to have small frames padded. It always worked this way,
    > and I retested on P2020RDB and LS1021RDB and works.
    > Are you saying that padding does not work on your board with the current upstream code?

It works but the settings does not match with what's mentioned in p2020 rm and the bit 29 becomes redundant.
    
-Hemant