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Message-ID: <CA+sq2CeHTxmpv5moJvW8QZn=z+NqqkZJefM6Zg0ru56HwhFMQA@mail.gmail.com>
Date:   Wed, 20 Nov 2019 22:56:49 +0530
From:   Sunil Kovvuri <sunil.kovvuri@...il.com>
To:     David Miller <davem@...emloft.net>
Cc:     jakub.kicinski@...ronome.com,
        Linux Netdev List <netdev@...r.kernel.org>,
        Sunil Goutham <sgoutham@...vell.com>
Subject: Re: [PATCH v2 00/15] octeontx2-af: SSO, TIM HW blocks and other
 config support

On Wed, Nov 20, 2019 at 3:32 AM David Miller <davem@...emloft.net> wrote:
>
> From: Jakub Kicinski <jakub.kicinski@...ronome.com>
> Date: Tue, 19 Nov 2019 13:46:38 -0800
>
> > As I asked in my review of patch 4 in v1, please provide us with
> > accurate description of how does a system with a octeontx2 operate.
> > Best in the form of RST documentation in the Documentation/ directory,
> > otherwise it's very hard for upstream folks to review what you're doing.
>
> Yes, please do this.

Sure, will submit v3 with documentation which provides a high level
overview of the hardware
and the kernel drivers.

>
> Some of us are strongly suspecting that there is a third agent (via
> an SDK or similar) that programs part of this chip in a complete system
> and if that is the case you must fully disclose how all of this is
> intended to work.
>

The ones which configures HW are the drivers which may be in kernel or
userspace.
Few minor things are setup by firmware before kernel boots.

Thanks,
Sunil.

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