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Message-Id: <20191119.140222.1092498595946013025.davem@davemloft.net>
Date:   Tue, 19 Nov 2019 14:02:22 -0800 (PST)
From:   David Miller <davem@...emloft.net>
To:     jakub.kicinski@...ronome.com
Cc:     sunil.kovvuri@...il.com, netdev@...r.kernel.org,
        sgoutham@...vell.com
Subject: Re: [PATCH v2 00/15] octeontx2-af: SSO, TIM HW blocks and other
 config support

From: Jakub Kicinski <jakub.kicinski@...ronome.com>
Date: Tue, 19 Nov 2019 13:46:38 -0800

> As I asked in my review of patch 4 in v1, please provide us with
> accurate description of how does a system with a octeontx2 operate.
> Best in the form of RST documentation in the Documentation/ directory,
> otherwise it's very hard for upstream folks to review what you're doing.

Yes, please do this.

Some of us are strongly suspecting that there is a third agent (via
an SDK or similar) that programs part of this chip in a complete system
and if that is the case you must fully disclose how all of this is
intended to work.

Right now nobody has any idea what any of these new feature components
are, how there are used, how they are configured by the user, etc.

And the choices of things to put into debugfs seem completely arbitrary.

In short, these octeontx2 submissions are for huge complicated chip
and lack any wholistic description of how this stuff works,
understandable by those reviewing your changes rather than those who
are experts about this networking chip.

Thank you.

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