[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <27f65072-f3a1-7a3c-5e9e-0cc86d25ab51@televic.com>
Date: Wed, 4 Dec 2019 15:18:15 +0100
From: Jürgen Lambrecht <j.lambrecht@...evic.com>
To: "netdev@...r.kernel.org" <netdev@...r.kernel.org>
Cc: rasmus.villemoes@...vas.dk, Andrew Lunn <andrew@...n.ch>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
vivien.didelot@...il.com
Subject: net: dsa: mv88e6xxx: error parsing ethernet node from dts
Hi,
I extended the drivers/net/dsa/mv88e6xxx to add a new switch to the 6250 family, the 6071, see below. I will properly submit a patch once the driver is up and running.
I branched mainline on 4d856f72c10e Linux 5.3.
The problem is that I do not succeed to get the network interfaces specified in DTS. Here the interesting part from my dts, copied from vf610-zii-ssmb-spu3.dts, also imx6qdl-zii-rdu2.dtsi is almost the same. My dts includes imx6ul.dtsi.
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1>;
phy-mode = "rmii";
status = "okay";
fixed-link {
speed = <100>;
full-duplex;
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
switch: switch@0 {
compatible = "marvell,mv88e6250";
reg = <0>;
reset-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "eth0";
};
port@1 {
reg = <1>;
label = "x1";
};
port@2 {
reg = <2>;
label = "x2";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&fec1>; //<-- here error
fixed-link {
speed = <100>;
full-duplex;
};
};
};
};
};
};
Here parts of dmesg (no error reported):
[ 1.992342] libphy: Fixed MDIO Bus: probed
[ 2.009532] pps pps0: new PPS source ptp0
[ 2.014387] libphy: fec_enet_mii_bus: probed
[ 2.017159] mv88e6085 2188000.ethernet-1:00: switch 0x710 detected: Marvell 88E6071, revision 5
[ 2.125616] libphy: mv88e6xxx SMI: probed
[ 2.134450] fec 2188000.ethernet eth0: registered PHC device 0
...
[ 11.366359] Generic PHY fixed-0:00: attached PHY driver [Generic PHY] (mii_bus:phy_addr=fixed-0:00, irq=POLL)
[ 11.366722] fec 2188000.ethernet eth0: Link is Up - 100Mbps/Full - flow control off
When I enable debugging in the source code, I see that mv88e6xxx_probe() fails, because *'of_find_net_device_by_node(ethernet);'* fails. But why?, &fec1 does exist, although I find it strange to specify &fec1 inside &fec1 itself. But according to documentation and other examples, that is the way it is done.
Here some more details:
- The detect, and register read/write is OK: with #define _DEBUG I see a lot of successful register read/write (to global and phy registers).
- When I do not add the first fixed-link in DTS, the kernel hangs, or oopses, or runs but with warnings (..._sendmsg, probably trying to send dhcp requests)
- mv88e6xxx_probe() gives the error above because mv88e6xxx_register_switch(chip) fails, with 'goto_mdio'.
-------------------------------------------------------------------------------
diff --git a/drivers/net/dsa/mv88e6xxx/port.h b/drivers/net/dsa/mv88e6xxx/port.h
index 8d5a6cd6fb19..9c0b84fb69b0 100644
--- a/drivers/net/dsa/mv88e6xxx/port.h
+++ b/drivers/net/dsa/mv88e6xxx/port.h
@@ -100,6 +100,9 @@
/* Offset 0x03: Switch Identifier Register */
#define MV88E6XXX_PORT_SWITCH_ID 0x03
#define MV88E6XXX_PORT_SWITCH_ID_PROD_MASK 0xfff0
+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6020 0x0200
+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6070 0x0700
+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6071 0x0710
#define MV88E6XXX_PORT_SWITCH_ID_PROD_6085 0x04a0
#define MV88E6XXX_PORT_SWITCH_ID_PROD_6095 0x0950
#define MV88E6XXX_PORT_SWITCH_ID_PROD_6097 0x0990
@@ -117,6 +120,7 @@
#define MV88E6XXX_PORT_SWITCH_ID_PROD_6190 0x1900
#define MV88E6XXX_PORT_SWITCH_ID_PROD_6191 0x1910
#define MV88E6XXX_PORT_SWITCH_ID_PROD_6185 0x1a70
+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6220 0x2200
#define MV88E6XXX_PORT_SWITCH_ID_PROD_6240 0x2400
#define MV88E6XXX_PORT_SWITCH_ID_PROD_6250 0x2500
#define MV88E6XXX_PORT_SWITCH_ID_PROD_6290 0x2900
diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h
index 4646e46d47f2..207b777da98e 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.h
+++ b/drivers/net/dsa/mv88e6xxx/chip.h
@@ -41,6 +41,7 @@ enum mv88e6xxx_frame_mode {
/* List of supported models */
enum mv88e6xxx_model {
+ MV88E6071,
MV88E6085,
MV88E6095,
MV88E6097,
@@ -77,7 +78,7 @@ enum mv88e6xxx_family {
MV88E6XXX_FAMILY_6097, /* 6046 6085 6096 6097 */
MV88E6XXX_FAMILY_6165, /* 6123 6161 6165 */
MV88E6XXX_FAMILY_6185, /* 6108 6121 6122 6131 6152 6155 6182 6185 */
- MV88E6XXX_FAMILY_6250, /* 6250 */
+ MV88E6XXX_FAMILY_6250, /* 6020 6070 6071 6220 6250 */
MV88E6XXX_FAMILY_6320, /* 6320 6321 */
MV88E6XXX_FAMILY_6341, /* 6141 6341 */
MV88E6XXX_FAMILY_6351, /* 6171 6175 6350 6351 */
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index d0a97eb73a37..c697ebd6e336 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -3881,13 +3881,34 @@ static const struct mv88e6xxx_ops mv88e6390x_ops = {
};
static const struct mv88e6xxx_info mv88e6xxx_table[] = {
+ [MV88E6071] = {
+ .prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6071,
+ .family = MV88E6XXX_FAMILY_6250,
+ .name = "Marvell 88E6071",
+ .num_databases = 64,
+ .num_ports = 7,
+ .num_internal_phys = 5,
+ .max_vid = 4095,
+ .port_base_addr = 0x08,
+ .phy_base_addr = 0x00,
+ .global1_addr = 0x0f,
+ .global2_addr = 0x07,
+ .age_time_coeff = 15000,
+ .g1_irqs = 9,
+ .g2_irqs = 10,
+ .atu_move_port_mask = 0xf,
+ .dual_chip = true,
+ .tag_protocol = DSA_TAG_PROTO_DSA,
+ .ops = &mv88e6250_ops,
+ },
+
[MV88E6085] = {
.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6085,
.family = MV88E6XXX_FAMILY_6097,
.name = "Marvell 88E6085",
- .num_databases = 4096,
+ .num_databases = 64,
.num_ports = 10,
- .num_internal_phys = 5,
+ .num_internal_phys = 8,
.max_vid = 4095,
.port_base_addr = 0x10,
.phy_base_addr = 0x0,
@@ -3909,7 +3930,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.name = "Marvell 88E6095/88E6095F",
.num_databases = 256,
.num_ports = 11,
- .num_internal_phys = 0,
+ .num_internal_phys = 8,
.max_vid = 4095,
.port_base_addr = 0x10,
.phy_base_addr = 0x0,
--
Kind Regards,
Jürgen Lambrecht
R&D Associate
Powered by blists - more mailing lists