netdev - Re: [PATCH net-next 0/2] Fix 10G PHY interface types

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Message-ID: <20200103164745.GL1397@lunn.ch>
Date:   Fri, 3 Jan 2020 17:47:45 +0100
From:   Andrew Lunn <andrew@...n.ch>
To:     "Madalin Bucur (OSS)" <madalin.bucur@....nxp.com>
Cc:     Russell King - ARM Linux admin <linux@...linux.org.uk>,
        Florian Fainelli <f.fainelli@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Jonathan Corbet <corbet@....net>,
        Kishon Vijay Abraham I <kishon@...com>,
        "linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: Re: [PATCH net-next 0/2] Fix 10G PHY interface types

> And here is a LS1046A SoC document that describes XFI and 10GBASE_KR:
> 
> https://www.mouser.com/pdfdocs/LS1046A.pdf

I don't see any register descriptions here. So you failed to answer my
question. What do you actually need to configure? What needs to go
into DT? 

You keep avoiding the questions Russell and I pose, which is not
helping your argument. We need details, not hand waiving.

	Andrew