lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CA+h21hoxY=4L53JGFmRTx5=CGbjY0pNpTSKd=ynDLdP_-CTO5g@mail.gmail.com>
Date:   Sat, 4 Jan 2020 20:56:12 +0200
From:   Vladimir Oltean <olteanv@...il.com>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     David Miller <davem@...emloft.net>,
        netdev <netdev@...r.kernel.org>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Chris Healy <Chris.Healy@....aero>
Subject: Re: [PATCH net] net: dsa: mv88e6xxx: Preserve priority went setting
 CPU port.

Hi Andrew,

Is there a typo in the commit message? (went -> when)

On Sat, 4 Jan 2020 at 18:16, Andrew Lunn <andrew@...n.ch> wrote:
>
> The 6390 family uses an extended register to set the port connected to
> the CPU. The lower 5 bits indicate the port, the upper three bits are
> the priority of the frames as they pass through the switch, what
> egress queue they should use, etc. Since frames being set to the CPU
> are typically management frames, BPDU, IGMP, ARP, etc set the priority
> to 7, the reset default, and the highest.
>
> Fixes: 33641994a676 ("net: dsa: mv88e6xxx: Monitor and Management tables")
> Signed-off-by: Andrew Lunn <andrew@...n.ch>
> ---

Offtopic: Does the switch look at VLAN PCP for these frames at all, or
is the priority fixed to the value from this register?

>  drivers/net/dsa/mv88e6xxx/global1.c | 5 +++++
>  drivers/net/dsa/mv88e6xxx/global1.h | 1 +
>  2 files changed, 6 insertions(+)
>
> diff --git a/drivers/net/dsa/mv88e6xxx/global1.c b/drivers/net/dsa/mv88e6xxx/global1.c
> index 120a65d3e3ef..ce03f155e9fb 100644
> --- a/drivers/net/dsa/mv88e6xxx/global1.c
> +++ b/drivers/net/dsa/mv88e6xxx/global1.c
> @@ -360,6 +360,11 @@ int mv88e6390_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port)
>  {
>         u16 ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_CPU_DEST;
>
> +       /* Use the default high priority for manegement frames sent to

management

> +        * the CPU.
> +        */
> +       port |= MV88E6390_G1_MONITOR_MGMT_CTL_PTR_CPU_DEST_MGMTPRI;
> +
>         return mv88e6390_g1_monitor_write(chip, ptr, port);
>  }
>
> diff --git a/drivers/net/dsa/mv88e6xxx/global1.h b/drivers/net/dsa/mv88e6xxx/global1.h
> index bc5a6b2bb1e4..5324c6f4ae90 100644
> --- a/drivers/net/dsa/mv88e6xxx/global1.h
> +++ b/drivers/net/dsa/mv88e6xxx/global1.h
> @@ -211,6 +211,7 @@
>  #define MV88E6390_G1_MONITOR_MGMT_CTL_PTR_INGRESS_DEST         0x2000
>  #define MV88E6390_G1_MONITOR_MGMT_CTL_PTR_EGRESS_DEST          0x2100
>  #define MV88E6390_G1_MONITOR_MGMT_CTL_PTR_CPU_DEST             0x3000
> +#define MV88E6390_G1_MONITOR_MGMT_CTL_PTR_CPU_DEST_MGMTPRI     0x00e0

I suppose this could be more nicely expressed as
MV88E6390_G1_MONITOR_MGMT_CTL_PTR_CPU_DEST_MGMTPRI(x)    ((x) << 5 &
GENMASK(7, 5)), in case somebody wants to change it from 7?

>  #define MV88E6390_G1_MONITOR_MGMT_CTL_DATA_MASK                        0x00ff
>
>  /* Offset 0x1C: Global Control 2 */
> --
> 2.24.0
>

Regards,
-Vladimir

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ