netdev - Re: [net-next V2 11/14] ethtool: Add support for low latency RS FEC

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Date:   Sat, 25 Jan 2020 11:40:37 -0800
From:   Jakub Kicinski <kuba@...nel.org>
To:     Saeed Mahameed <saeedm@...lanox.com>
Cc:     "David S. Miller" <davem@...emloft.net>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        Aya Levin <ayal@...lanox.com>,
        Eran Ben Elisha <eranbe@...lanox.com>,
        Andrew Lunn <andrew@...n.ch>,
        Florian Fainelli <f.fainelli@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Russell King <linux@...linux.org.uk>,
        Michal Kubecek <mkubecek@...e.cz>
Subject: Re: [net-next V2 11/14] ethtool: Add support for low latency RS FEC

On Sat, 25 Jan 2020 05:11:52 +0000, Saeed Mahameed wrote:
> From: Aya Levin <ayal@...lanox.com>
> 
> Add support for low latency Reed Solomon FEC as LLRS.
> 
> Signed-off-by: Aya Levin <ayal@...lanox.com>
> Reviewed-by: Eran Ben Elisha <eranbe@...lanox.com>
> Signed-off-by: Saeed Mahameed <saeedm@...lanox.com>

This is kind of buried in the midst of the driver patches.
It'd preferably be a small series of its own. 
Let's at least try to CC PHY folk now.

Is this from some standard?

> diff --git a/drivers/net/phy/phy-core.c b/drivers/net/phy/phy-core.c
> index a4d2d59fceca..e083e7a76ada 100644
> --- a/drivers/net/phy/phy-core.c
> +++ b/drivers/net/phy/phy-core.c
> @@ -8,7 +8,7 @@
>  
>  const char *phy_speed_to_str(int speed)
>  {
> -	BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 74,
> +	BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 75,
>  		"Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
>  		"If a speed or mode has been added please update phy_speed_to_str "
>  		"and the PHY settings array.\n");
> diff --git a/include/uapi/linux/ethtool.h b/include/uapi/linux/ethtool.h
> index 116bcbf09c74..e0c4383ea952 100644
> --- a/include/uapi/linux/ethtool.h
> +++ b/include/uapi/linux/ethtool.h
> @@ -1326,6 +1326,7 @@ enum ethtool_fec_config_bits {
>  	ETHTOOL_FEC_OFF_BIT,
>  	ETHTOOL_FEC_RS_BIT,
>  	ETHTOOL_FEC_BASER_BIT,
> +	ETHTOOL_FEC_LLRS_BIT,
>  };
>  
>  #define ETHTOOL_FEC_NONE		(1 << ETHTOOL_FEC_NONE_BIT)
> @@ -1333,6 +1334,7 @@ enum ethtool_fec_config_bits {
>  #define ETHTOOL_FEC_OFF			(1 << ETHTOOL_FEC_OFF_BIT)
>  #define ETHTOOL_FEC_RS			(1 << ETHTOOL_FEC_RS_BIT)
>  #define ETHTOOL_FEC_BASER		(1 << ETHTOOL_FEC_BASER_BIT)
> +#define ETHTOOL_FEC_LLRS		(1 << ETHTOOL_FEC_LLRS_BIT)
>  
>  /* CMDs currently supported */
>  #define ETHTOOL_GSET		0x00000001 /* DEPRECATED, Get settings.
> @@ -1517,7 +1519,7 @@ enum ethtool_link_mode_bit_indices {
>  	ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT = 71,
>  	ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT	 = 72,
>  	ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT	 = 73,
> -
> +	ETHTOOL_LINK_MODE_FEC_LLRS_BIT			 = 74,
>  	/* must be last entry */
>  	__ETHTOOL_LINK_MODE_MASK_NBITS
>  };
> diff --git a/net/ethtool/common.c b/net/ethtool/common.c
> index e621b1694d2f..8e4e809340f0 100644
> --- a/net/ethtool/common.c
> +++ b/net/ethtool/common.c
> @@ -167,6 +167,7 @@ const char link_mode_names[][ETH_GSTRING_LEN] = {
>  	__DEFINE_LINK_MODE_NAME(400000, LR8_ER8_FR8, Full),
>  	__DEFINE_LINK_MODE_NAME(400000, DR8, Full),
>  	__DEFINE_LINK_MODE_NAME(400000, CR8, Full),
> +	__DEFINE_SPECIAL_MODE_NAME(FEC_LLRS, "LLRS"),
>  };
>  static_assert(ARRAY_SIZE(link_mode_names) == __ETHTOOL_LINK_MODE_MASK_NBITS);
>  
> diff --git a/net/ethtool/linkmodes.c b/net/ethtool/linkmodes.c
> index 96f20be64553..f049b97072fe 100644
> --- a/net/ethtool/linkmodes.c
> +++ b/net/ethtool/linkmodes.c
> @@ -237,6 +237,7 @@ static const struct link_mode_info link_mode_params[] = {
>  	__DEFINE_LINK_MODE_PARAMS(400000, LR8_ER8_FR8, Full),
>  	__DEFINE_LINK_MODE_PARAMS(400000, DR8, Full),
>  	__DEFINE_LINK_MODE_PARAMS(400000, CR8, Full),
> +	__DEFINE_SPECIAL_MODE_PARAMS(FEC_LLRS),
>  };
>  
>  static const struct nla_policy