netdev - Re: [PATCH net-next 0/10] net: dsa: improve serdes integration

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Date:   Fri, 6 Mar 2020 01:27:29 +0100
From:   Andrew Lunn <andrew@...n.ch>
To:     Russell King - ARM Linux admin <linux@...linux.org.uk>
Cc:     Florian Fainelli <f.fainelli@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>, netdev@...r.kernel.org,
        Vivien Didelot <vivien.didelot@...il.com>
Subject: Re: [PATCH net-next 0/10] net: dsa: improve serdes integration

On Thu, Mar 05, 2020 at 11:45:57PM +0000, Russell King - ARM Linux admin wrote:
> On Thu, Mar 05, 2020 at 11:54:07PM +0100, Andrew Lunn wrote:
> > On Thu, Mar 05, 2020 at 12:41:39PM +0000, Russell King - ARM Linux admin wrote:
> > > Andrew Lunn mentioned that the Serdes PCS found in Marvell DSA switches
> > > does not automatically update the switch MACs with the link parameters.
> > > Currently, the DSA code implements a work-around for this.
> > > 
> > > This series improves the Serdes integration, making use of the recent
> > > phylink changes to support split MAC/PCS setups.  One noticable
> > > improvement for userspace is that ethtool can now report the link
> > > partner's advertisement.
> > 
> > Hi Russel
> > 
> > I started testing this patchset today. But ran into issues with ZII
> > scu4-aib and ZII devel c. I think the CPU port is running at the wrong
> > speed, but i'm not sure yet. Nor do i know if it is this patchset, or
> > something earlier.
> 
> It could be this patch set; remember the integration of phylink into
> DSA for CPU and inter-switch ports is already broken, particularly
> for links that do not specify any fixed-link properties.
> 
> For ZII platforms, the fixed link parameters are specified, so this
> should not be the case.

Hi Russell

I think phylink integration for DSA for CPU ports is partly to
blame. I was testing with a port which required working DSA links.
devel C does not have fixed links for the DSA ports.

However, SCU4-AIB i was testing with does have fixed links everywhere.
Yet this also fails.

> FYI, the port status and control register for the CPU port on the
> ZII rev C should be:
> 
> 0 = 0xd04
> 1 = 0x203d

Yes, that is part of the funny thing. I see 0xe04 for 0. But 1 seems
correct. The data sheet also suggests when the port is forced, the
values in 0 don't reflect the actual values. However, in the good
case, i do have 0xd04.

I need to separate out breakage from CPU/DSA integration and possible
breakage from this patchset. I'm now testing using a copper port on
the first switch, so eliminating a DSA link.

    Andrew