netdev - Re: [PATCH net-next 0/5] add phylink support for PCS

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Message-ID: <CA+h21hpk+TMofHFjg_Z-UZOPp+7zn29ZNLFP+JKreJtbZouiZQ@mail.gmail.com>
Date:   Wed, 11 Mar 2020 15:57:18 +0200
From:   Vladimir Oltean <olteanv@...il.com>
To:     Russell King - ARM Linux admin <linux@...linux.org.uk>
Cc:     Andrew Lunn <andrew@...n.ch>,
        Florian Fainelli <f.fainelli@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        netdev <netdev@...r.kernel.org>
Subject: Re: [PATCH net-next 0/5] add phylink support for PCS

On Wed, 11 Mar 2020 at 14:54, Russell King - ARM Linux admin
<linux@...linux.org.uk> wrote:
>
> On Wed, Mar 11, 2020 at 02:46:33PM +0200, Vladimir Oltean wrote:
> > Hi Russell,
> >
> > On Wed, 11 Mar 2020 at 14:09, Russell King - ARM Linux admin
> > <linux@...linux.org.uk> wrote:
> > >
> > > Hi,
> > >
> > > This series adds support for IEEE 802.3 register set compliant PCS
> > > for phylink.  In order to do this, we:
> > >
> > > 1. convert the existing (unused) mii_lpa_to_ethtool_lpa_x() function
> > >    to a linkmode variant.
> > > 2. add a helper for clause 37 advertisements, supporting both the
> > >    1000baseX and defacto 2500baseX variants. Note that ethtool does
> > >    not support half duplex for either of these, and we make no effort
> > >    to do so.
> > > 3. add accessors for modifying a MDIO device register, and use them in
> > >    phylib, rather than duplicating the code from phylib.
> >
> > Have you considered accessing the PCS as a phy_device structure, a la
> > drivers/net/dsa/ocelot/felix_vsc9959.c?
>
> I don't want to tie this into phylib, because I don't think phylib
> should be dealing with PCS.  It brings with it many problems, such as:
>

Agree that the struct mdio_device -> struct phy_device diff is pretty
much useless to a PCS.

> 1. how do we know whether the Clause 22 registers are supposed to be
>    Clause 37 format.

Well, they are, aren't they?

> 2. how do we program the PCS appropriately for the negotiation results
>    (which phylib doesn't support).

You mean how to read the LPA and logically-AND it with ADV?
The PCS doesn't need to be "programmed" according to the resolved link
state. Maybe the MAC does.

> 3. how do we deal with selecting the appropriate device for the mode
>    selected (LX2160A has multiple different PCS which depend on the
>    mode selected.)

What I've been doing is to call get_phy_device with an is_c45 argument
depending on the PHY interface type.
Actually the real problem in your case is that the LX2160A doesn't
expose a valid PHY ID in registers 2&3 (unlike other Layerscape PCS
implementations), so get_phy_device is likely going to fail unless
some sort of PHY ID fixup is not done.

>
> Note that a phy_device structure embeds a mdio_device structure, and
> so these helpers can be used inside phylib if one desires - so this
> approach is more flexible than "bolt it into phylib" approach would
> be.
>

It's hard to really say without seeing more than one caller of these
new helpers.
For example the sja1105 DSA switch has a PCS for SGMII (not supported
yet in mainline) that kind-of-emulates a C22 register map, except that
it's accessed over SPI, and that the "pcs_get_state" needs to look at
some vendor-specific registers too. From that perspective, I was
thinking that PHYLINK could be given a phy_device structure with the
advertising, supported and lp_advertising linkmode bit fields
populated who-knows-how, and PHYLINK just resolves that into its
phylink_link_state structure.
But then I guess that sort of hardware is not among your target
candidates for the generic helpers. Whoever can't expose an MDIO bus
or needs to access any vendor-specific register just shouldn't use
these functions. And maybe you're right, I don't really know what the
balance in practice will be.

> > > 4. add support for decoding the advertisement from clause 22 compatible
> > >    register sets for clause 37 advertisements and SGMII advertisements.
> > > 5. add support for clause 45 register sets for 10GBASE-R PCS.
> > >
> > > These have been tested on the LX2160A Clearfog-CX platform.
> > >
> > >  drivers/net/phy/mdio_bus.c |  55 +++++++++++
> > >  drivers/net/phy/phy-core.c |  31 ------
> > >  drivers/net/phy/phylink.c  | 236 +++++++++++++++++++++++++++++++++++++++++++++
> > >  include/linux/mdio.h       |   4 +
> > >  include/linux/mii.h        |  57 +++++++----
> > >  include/linux/phy.h        |  19 ++++
> > >  include/linux/phylink.h    |   8 ++
> > >  include/uapi/linux/mii.h   |   5 +
> > >  8 files changed, 366 insertions(+), 49 deletions(-)
> > >
> > > --
> > > RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
> > > FTTC broadband for 0.8mile line in suburbia: sync at 10.2Mbps down 587kbps up
>
> --
> RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
> FTTC broadband for 0.8mile line in suburbia: sync at 10.2Mbps down 587kbps up

Regards,
-Vladimir