netdev - Re: [PATCH] net: dsa: mv88e6xxx: don't force settings on CPU port

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Mon, 30 Mar 2020 15:40:10 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Daniel Mack <daniel@...que.org>
Cc:     vivien.didelot@...il.com, f.fainelli@...il.com,
        davem@...emloft.net, netdev@...r.kernel.org
Subject: Re: [PATCH] net: dsa: mv88e6xxx: don't force settings on CPU port

On Mon, Mar 30, 2020 at 11:29:27AM +0200, Daniel Mack wrote:
> On 3/28/20 12:52 AM, Andrew Lunn wrote:
> >> I tried this as well with v5.5, but that leads to the external phy not
> >> seeing a link at all. Will check again though.
> > 
> > Did you turn off auto-neg on the external PHY and use fixed 100Full?
> > Ethtool on the SoC interface should show you if the switch PHY is
> > advertising anything. I'm guessing it is not, and hence you need to
> > turn off auto neg on the external PHY.
> > 
> > Another option would be something like
> > 
> >                                         port@6 {
> >                                                 reg = <6>;
> >                                                 label = "cpu";
> >                                                 ethernet = <&fec1>;
> > 
> >                                                 phy-handle = <phy6>;
> >                                         };
> >                                 };
> > 
> >                                 mdio {
> >                                         #address-cells = <1>;
> >                                         #size-cells = <0>;
> >                                         phy6: ethernet-phy@6 {
> >                                                 reg = <6>;
> >                                                 interrupt-parent = <&switch0>;
> >                                                 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
> >                                         };
> >                                 };
> > 
> > By explicitly saying there is a PHY for the CPU node, phylink might
> > drive it.

You want to debug this. Although what you have is unusual, yours is
not the only board. It is something we want to work. And ideally,
there should be something controlling the PHY.

      Andrew