netdev - Re: [PATCH net] net: dsa: Don't instantiate phylink for CPU/DSA ports unless needed

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Message-ID: <20200331125718.GM25745@shell.armlinux.org.uk>
Date:   Tue, 31 Mar 2020 13:57:18 +0100
From:   Russell King - ARM Linux admin <linux@...linux.org.uk>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     David Miller <davem@...emloft.net>,
        netdev <netdev@...r.kernel.org>,
        Florian Fainelli <f.fainelli@...il.com>, ioana.ciornei@....com,
        olteanv@...il.com
Subject: Re: [PATCH net] net: dsa: Don't instantiate phylink for CPU/DSA
 ports unless needed

On Wed, Mar 11, 2020 at 04:24:24PM +0100, Andrew Lunn wrote:
> By default, DSA drivers should configure CPU and DSA ports to their
> maximum speed. In many configurations this is sufficient to make the
> link work.
> 
> In some cases it is necessary to configure the link to run slower,
> e.g. because of limitations of the SoC it is connected to. Or back to
> back PHYs are used and the PHY needs to be driven in order to
> establish link. In this case, phylink is used.
> 
> Only instantiate phylink if it is required. If there is no PHY, or no
> fixed link properties, phylink can upset a link which works in the
> default configuration.
> 
> Fixes: 0e27921816ad ("net: dsa: Use PHYLINK for the CPU/DSA ports")
> Signed-off-by: Andrew Lunn <andrew@...n.ch>

Hi Andrew,

This seems to conflict with the serdes changes.  For a CPU port using
a serdes connection, we claim the serdes interrupt, which then triggers
this:

[    9.069631] Unable to handle kernel NULL pointer dereference at virtual address 00000124
[    9.077785] pgd = c0004000
[    9.080528] [00000124] *pgd=00000000
[    9.084157] Internal error: Oops: 805 [#1] SMP ARM
[    9.088961] Modules linked in: tag_edsa spi_nor mtd xhci_plat_hcd mv88e6xxx(+) xhci_hcd armada_thermal marvell_cesa dsa_core ehci_orion libdes phy_armada38x_comphy at24 mcp3021 sfp evbug spi_orion sff mdio_i2c
[    9.107625] CPU: 1 PID: 214 Comm: irq/55-mv88e6xx Not tainted 5.6.0+ #470
[    9.114429] Hardware name: Marvell Armada 380/385 (Device Tree)
[    9.120371] PC is at phylink_mac_change+0x10/0x88
[    9.125129] LR is at mv88e6352_serdes_irq_status+0x74/0x94 [mv88e6xxx]

which is because dp->pl is NULL in dsa_port_phylink_mac_change() as a
result of this commit for links operating at max speed without a
fixed-link property.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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