netdev - Re: [RFC PATCH 0/3] net: macb: Wake-on-Lan magic packet fixes

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Date:   Mon, 6 Apr 2020 16:25:47 +0200
From:   Nicolas Ferre <nicolas.ferre@...rochip.com>
To:     Harini Katakam <harinik@...inx.com>
CC:     <linux-arm-kernel@...ts.infradead.org>, <netdev@...r.kernel.org>,
        "Claudiu Beznea" <claudiu.beznea@...rochip.com>,
        Harini Katakam <harini.katakam@...inx.com>,
        <linux-kernel@...r.kernel.org>,
        "David S. Miller" <davem@...emloft.net>,
        Alexandre Belloni <alexandre.belloni@...tlin.com>,
        Rafal Ozieblo <rafalo@...ence.com>,
        <sergio.prado@...abworks.com>, <antoine.tenart@...tlin.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        <linux@...linux.org.uk>, Andrew Lunn <andrew@...n.ch>,
        Michal Simek <michal.simek@...inx.com>
Subject: Re: [RFC PATCH 0/3] net: macb: Wake-on-Lan magic packet fixes

Hi Harini,

On 03/04/2020 at 15:36, Harini Katakam wrote:
> Hi Nicolas,
> 
> On Fri, Apr 3, 2020 at 6:45 PM <nicolas.ferre@...rochip.com> wrote:
>>
>> From: Nicolas Ferre <nicolas.ferre@...rochip.com>
>>
>> Hi,
>> Here are some of my early patches in order to fix WoL magic-packet on the
>> current macb driver.
>> Addition of this feature to GEM types of IPs is yet to come. I would like to
>> have your feedback on these little patches first so that I can continue
>> investigating the addition of GEM WoL magic-packet.
>>
>> Harini, I know that you have patches for GEM in order to integrate WoL ARP
>> mode [1]. I'll try to integrate some of your work but would need that this feature
>> is better integrated in current code. For instance, the choice of "magic
>> packet" or "ARP" should be done by ethtool options and DT properties. For
>> matching with mainline users, MACB and GEM code must co-exist.
> 
> Agree. I'll try to test this series and get back to you next week.
> 
>> The use of dumb buffers for RX seems also fairly platform specific and we would
>> need to think more about it.
> 
> I know that the IP versions from r1p10 have a mechanism to disable DMA queues
> (bit 0 of the queue pointer register) which is cleaner. But for
> earlier IP versions,

Which IP name are you referring to? GEM, GEM-GXL? What is the value of 
register 0xFC then?

> I remember discussing with Cadence and there is no way to keep RX
> enabled for WOL
> with RX DMA disabled. I'm afraid that means there should be a bare
> minimum memory
> region with a dummy descriptor if you do not want to process the
> packets. That memory
> should also be accessible while the rest of the system is powered
> down. Please let me

Very interesting information Harini, thanks a lot for having shared it.

My GEM IP has 0xFC at value: 0x00020203. But I don't see a way to keep 
DMA queues disabled by using the famous bit that you mention above.

> know if you think of any other solution.

I'm trying all this right now. I keep you posted.

Thanks and best regards,
   Nicolas


-- 
Nicolas Ferre