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Message-ID: <2ca0c449-ca84-05b0-2f9e-2c03a5996e91@gmail.com>
Date: Mon, 20 Apr 2020 20:37:27 -0700
From: Florian Fainelli <f.fainelli@...il.com>
To: Jeff Kirsher <jeffrey.t.kirsher@...el.com>, davem@...emloft.net
Cc: Jack Ping CHNG <jack.ping.chng@...ux.intel.com>,
netdev@...r.kernel.org, nhorman@...hat.com, sassmann@...hat.com,
Amireddy Mallikarjuna reddy
<mallikarjunax.reddy@...ux.intel.com>,
Hauke Mehrtens <hauke@...ke-m.de>, Andrew Lunn <andrew@...n.ch>
Subject: Re: [net-next 1/1] gwdpa: gswip: Introduce Gigabit Ethernet Switch
(GSWIP) device driver
On 4/20/2020 8:22 PM, Jeff Kirsher wrote:
> From: Jack Ping CHNG <jack.ping.chng@...ux.intel.com>
>
> This driver enables the Intel's LGM SoC GSWIP block. GSWIP is a core module
> tailored for L2/L3/L4+ data plane and QoS functions. It allows CPUs and
> other accelerators connected to the SoC datapath to enqueue and dequeue
> packets through DMAs. Most configuration values are stored in tables
> such as Parsing and Classification Engine tables, Buffer Manager tables
> and Pseudo MAC tables.
What is the relationship between LGM's GWSWIP block and the existing
switch drivers under drivers/net/dsa/lantiq_gswip.c other than
reflecting the acquisition that happened years ago?
--
Florian
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