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Date:   Thu, 14 May 2020 22:50:28 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Dan Murphy <dmurphy@...com>
Cc:     f.fainelli@...il.com, hkallweit1@...il.com, davem@...emloft.net,
        robh@...nel.org, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        Rob Herring <robh+dt@...nel.org>
Subject: Re: [PATCH net-next 1/2] dt-bindings: net: dp83822: Add TI dp83822
 phy

> > Hi Dan
> > 
> > You say 10/100 Mbps Ethernet PHY, but then list RGMII?
> Copied from the data sheet.

O.K. So maybe it can connect over RGMII, but then only run 100Mbps
over it, rather than 1G.

> The LED_1 pin can be strapped to be an input to the chip for signal loss
> detection.  This is an optional feature of the PHY.
> 
> This property defines the polarity for the 822 LED_1/GPIO input pin.
> 
> The LOS is not required to be connected to the PHY.  If the preferred method
> is to use the SFP framework and Processor GPIOs then I can remove this from
> the patch set.
> 
> And if a user would like to use the feature then they can add it.

Well, both options are supported by the hardware. So i'm wondering if
we need to support both. So one property indicating the LOS is
actually connected to the PHY and a second indicating the polarity?

	 Andrew

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