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Message-ID: <fb452fc7-b3df-f11a-0122-f9315bd38269@denx.de>
Date:   Sun, 17 May 2020 22:08:22 +0200
From:   Marek Vasut <marex@...x.de>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     David Miller <davem@...emloft.net>, netdev@...r.kernel.org,
        lukas@...ner.de, ynezz@...e.cz, yuehaibing@...wei.com
Subject: Re: [PATCH V6 00/20] net: ks8851: Unify KS8851 SPI and MLL drivers

On 5/17/20 9:26 PM, Andrew Lunn wrote:
>> So I was already led into reworking the entire series to do this
>> inlining once, after V1. It then turned out it's a horrible mess to get
>> everything to compile as modules and built-in and then also only the
>> parallel/SPI as a module and then the other way around.
> 
> Maybe consider some trade offs. Have both sets of accessors in the
> core, and then thin wrappers around it to probe on each bus type. You
> bloat the core, but avoid the indirection. You can also have the core
> as a standalone module, which exports symbols for the wrappers to
> use. It does take some Kconfig work to get built in vs modules
> correct, but there are people who can help. It is also not considered
> a regression if you reduce the options in terms of module vs built in.

I think this is what we attempted with V1/V2/V3 already, except back
then it was to improve performance, which turned out to be a no-issue,
as the performance is the same with or without the indirect accessors
(of course it is, the interface is so slow the indirect accessors make
no difference, plus add into it that it's communicating with the NIC
through SPI core and SPI drivers, which are full of this indirection
already).

Or do I misunderstand something?

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