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Date:   Tue, 26 May 2020 20:22:00 -0700 (PDT)
From:   David Miller <>
Subject: Re: [PATCH net v3 0/4] net: ethernet: fec: move GPR reigster
 offset and bit into DT

Date: Tue, 26 May 2020 00:27:09 +0800

> From: Fugang Duan <>
> The commit da722186f654 (net: fec: set GPR bit on suspend by
> DT configuration) set the GPR reigster offset and bit in driver
> for wol feature support.
> It brings trouble to enable wol feature on imx6sx/imx6ul/imx7d
> platforms that have multiple ethernet instances with different
> GPR bit for stop mode control. So the patch set is to move GPR
> register offset and bit define into DT, and enable imx6q/imx6dl
> imx6qp/imx6sx/imx6ul/imx7d stop mode support.
> Currently, below NXP i.MX boards support wol:
> - imx6q/imx6dl/imx6qp sabresd
> - imx6sx sabreauto
> - imx7d sdb
> imx6q/imx6dl/imx6qp sabresd board dts file miss the property
> "fsl,magic-packet;", so patch#4 is to add the property for stop
> mode support.
> v1 -> v2:
>  - driver: switch back to store the quirks bitmask in driver_data
>  - dt-bindings: rename 'gpr' property string to 'fsl,stop-mode'
>  - imx6/7 dtsi: add imx6sx/imx6ul/imx7d ethernet stop mode property
> v2 -> v3:
>  - driver: suggested by Sascha Hauer, use a struct fec_devinfo for
>    abstracting differences between different hardware variants,
>    it can give more freedom to describe the differences.
>  - imx6/7 dtsi: correct one typo pointed out by Andrew.
> Thanks Martin, Andrew and Sascha Hauer for the review.

Series applied to net-next, thanks.

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