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Message-ID: <20200620144321.GH304147@lunn.ch>
Date: Sat, 20 Jun 2020 16:43:21 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Oleksij Rempel <linux@...pel-privat.de>
Cc: Geert Uytterhoeven <geert+renesas@...der.be>,
Sergei Shtylyov <sergei.shtylyov@...entembedded.com>,
"David S . Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Philippe Schenker <philippe.schenker@...adex.com>,
Florian Fainelli <f.fainelli@...il.com>,
Heiner Kallweit <hkallweit1@...il.com>,
Kazuya Mizuguchi <kazuya.mizuguchi.ks@...esas.com>,
Wolfram Sang <wsa+renesas@...g-engineering.com>,
netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-renesas-soc@...r.kernel.org
Subject: Re: [PATCH/RFC 1/5] dt-bindings: net: renesas,ravb: Document
internal clock delay properties
On Sat, Jun 20, 2020 at 07:47:16AM +0200, Oleksij Rempel wrote:
> Hi Geert,
>
> Am 19.06.20 um 21:15 schrieb Geert Uytterhoeven:
> > Some EtherAVB variants support internal clock delay configuration, which
> > can add larger delays than the delays that are typically supported by
> > the PHY (using an "rgmii-*id" PHY mode, and/or "[rt]xc-skew-ps"
> > properties).
> >
> > Add properties for configuring the internal MAC delays.
> > These properties are mandatory, even when specified as zero, to
> > distinguish between old and new DTBs.
> >
> > Update the example accordingly.
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@...der.be>
> > ---
> > .../devicetree/bindings/net/renesas,ravb.txt | 29 ++++++++++---------
> > 1 file changed, 16 insertions(+), 13 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/net/renesas,ravb.txt b/Documentation/devicetree/bindings/net/renesas,ravb.txt
> > index 032b76f14f4fdb38..488ada78b6169b8e 100644
> > --- a/Documentation/devicetree/bindings/net/renesas,ravb.txt
> > +++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt
> > @@ -64,6 +64,18 @@ Optional properties:
> > AVB_LINK signal.
> > - renesas,ether-link-active-low: boolean, specify when the AVB_LINK signal is
> > active-low instead of normal active-high.
> > +- renesas,rxc-delay-ps: Internal RX clock delay.
>
> may be it make sense to add a generic delay property for MACs and PHYs?
See Dan Murphys "RGMII Internal delay common property" patchset. That
patchset is addressing the PHY side. Maybe we can build on that to
address the MAC side?
Andrew
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