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Message-ID: <BYAPR18MB279162CD0E37EBB66090BCD6A03C0@BYAPR18MB2791.namprd18.prod.outlook.com>
Date: Sat, 19 Sep 2020 08:46:56 +0000
From: Srujana Challa <schalla@...vell.com>
To: Saeed Mahameed <saeed@...nel.org>,
"herbert@...dor.apana.org.au" <herbert@...dor.apana.org.au>,
"davem@...emloft.net" <davem@...emloft.net>
CC: "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"linux-crypto@...r.kernel.org" <linux-crypto@...r.kernel.org>,
"kuba@...nel.org" <kuba@...nel.org>,
Sunil Kovvuri Goutham <sgoutham@...vell.com>,
Geethasowjanya Akula <gakula@...vell.com>,
"Subbaraya Sundeep Bhatta" <sbhatta@...vell.com>,
Suheil Chandran <schandran@...vell.com>,
Narayana Prasad Raju Athreya <pathreya@...vell.com>
Subject: RE: [PATCH v3,net-next,0/4] Add Support for Marvell OcteonTX2
Cryptographic
> Subject: Re: [PATCH v3,net-next,0/4] Add Support for Marvell OcteonTX2
> Cryptographic
>
> On Thu, 2020-09-17 at 18:58 +0530, Srujana Challa wrote:
> > The following series adds support for Marvell Cryptographic
> > Acceleration
> > Unit(CPT) on OcteonTX2 CN96XX SoC.
> > This series is tested with CRYPTO_EXTRA_TESTS enabled and
> > CRYPTO_DISABLE_TESTS disabled.
> >
>
> I am with Jakub on this one, 10K LOC require more explanation in the
> cover-letter.
> e.g. some background, high level design, device components being
> added/changed. Basically, what should we expect code-wise before we
> jump into 10K LOC review.
Okay, I will split the series up to smaller patches and submit the next version
with more information. Thanks.
>
> > Changes since v2:
> > * Fixed C=1 warnings.
> > * Added code to exit CPT VF driver gracefully.
> > * Moved OcteonTx2 asm code to a header file under include/linux/soc/
> >
> > Changes since v1:
> > * Moved Makefile changes from patch4 to patch2 and patch3.
> >
> > Srujana Challa (3):
> > octeontx2-pf: move asm code to include/linux/soc
> > octeontx2-af: add support to manage the CPT unit
> > drivers: crypto: add support for OCTEONTX2 CPT engine
> > drivers: crypto: add the Virtual Function driver for OcteonTX2 CPT
> >
> > MAINTAINERS | 2 +
> > drivers/crypto/marvell/Kconfig | 17 +
> > drivers/crypto/marvell/Makefile | 1 +
> > drivers/crypto/marvell/octeontx2/Makefile | 10 +
> > .../marvell/octeontx2/otx2_cpt_common.h | 53 +
> > .../marvell/octeontx2/otx2_cpt_hw_types.h | 467 ++++
> > .../marvell/octeontx2/otx2_cpt_mbox_common.c | 286 +++
> > .../marvell/octeontx2/otx2_cpt_mbox_common.h | 100 +
> > .../marvell/octeontx2/otx2_cpt_reqmgr.h | 197 ++
> > drivers/crypto/marvell/octeontx2/otx2_cptlf.h | 356 +++
> > .../marvell/octeontx2/otx2_cptlf_main.c | 967 ++++++++
> > drivers/crypto/marvell/octeontx2/otx2_cptpf.h | 79 +
> > .../marvell/octeontx2/otx2_cptpf_main.c | 598 +++++
> > .../marvell/octeontx2/otx2_cptpf_mbox.c | 694 ++++++
> > .../marvell/octeontx2/otx2_cptpf_ucode.c | 2173
> > +++++++++++++++++
> > .../marvell/octeontx2/otx2_cptpf_ucode.h | 180 ++
> > drivers/crypto/marvell/octeontx2/otx2_cptvf.h | 29 +
> > .../marvell/octeontx2/otx2_cptvf_algs.c | 1698 +++++++++++++
> > .../marvell/octeontx2/otx2_cptvf_algs.h | 172 ++
> > .../marvell/octeontx2/otx2_cptvf_main.c | 229 ++
> > .../marvell/octeontx2/otx2_cptvf_mbox.c | 189 ++
> > .../marvell/octeontx2/otx2_cptvf_reqmgr.c | 540 ++++
> > .../ethernet/marvell/octeontx2/af/Makefile | 3 +-
> > .../net/ethernet/marvell/octeontx2/af/mbox.h | 85 +
> > .../net/ethernet/marvell/octeontx2/af/rvu.c | 2 +-
> > .../net/ethernet/marvell/octeontx2/af/rvu.h | 7 +
> > .../ethernet/marvell/octeontx2/af/rvu_cpt.c | 343 +++
> > .../marvell/octeontx2/af/rvu_debugfs.c | 342 +++
> > .../ethernet/marvell/octeontx2/af/rvu_nix.c | 76 +
> > .../ethernet/marvell/octeontx2/af/rvu_reg.h | 65 +-
> > .../marvell/octeontx2/nic/otx2_common.h | 13 +-
> > include/linux/soc/marvell/octeontx2/asm.h | 29 +
> > 32 files changed, 9982 insertions(+), 20 deletions(-)
> > create mode 100644 drivers/crypto/marvell/octeontx2/Makefile
> > create mode 100644
> > drivers/crypto/marvell/octeontx2/otx2_cpt_common.h
> > create mode 100644
> > drivers/crypto/marvell/octeontx2/otx2_cpt_hw_types.h
> > create mode 100644
> > drivers/crypto/marvell/octeontx2/otx2_cpt_mbox_common.c
> > create mode 100644
> > drivers/crypto/marvell/octeontx2/otx2_cpt_mbox_common.h
> > create mode 100644
> > drivers/crypto/marvell/octeontx2/otx2_cpt_reqmgr.h
> > create mode 100644 drivers/crypto/marvell/octeontx2/otx2_cptlf.h
> > create mode 100644
> > drivers/crypto/marvell/octeontx2/otx2_cptlf_main.c
> > create mode 100644 drivers/crypto/marvell/octeontx2/otx2_cptpf.h
> > create mode 100644
> > drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c
> > create mode 100644
> > drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c
> > create mode 100644
> > drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
> > create mode 100644
> > drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.h
> > create mode 100644 drivers/crypto/marvell/octeontx2/otx2_cptvf.h
> > create mode 100644
> > drivers/crypto/marvell/octeontx2/otx2_cptvf_algs.c
> > create mode 100644
> > drivers/crypto/marvell/octeontx2/otx2_cptvf_algs.h
> > create mode 100644
> > drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c
> > create mode 100644
> > drivers/crypto/marvell/octeontx2/otx2_cptvf_mbox.c
> > create mode 100644
> > drivers/crypto/marvell/octeontx2/otx2_cptvf_reqmgr.c
> > create mode 100644
> > drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
> > create mode 100644 include/linux/soc/marvell/octeontx2/asm.h
> >
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