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Message-ID: <CAOMZO5Ds7mm4dWdt_a+HU=V40zjp006JQJbozRCicx9yiqacgg@mail.gmail.com>
Date:   Wed, 7 Oct 2020 06:50:38 -0300
From:   Fabio Estevam <festevam@...il.com>
To:     Oleksij Rempel <o.rempel@...gutronix.de>
Cc:     Andrew Lunn <andrew@...n.ch>, David Jander <david@...tonic.nl>,
        Sascha Hauer <kernel@...gutronix.de>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        netdev <netdev@...r.kernel.org>,
        Russell King <linux@...linux.org.uk>,
        Marc Kleine-Budde <mkl@...gutronix.de>,
        Marek Vasut <marex@...x.de>,
        Florian Fainelli <f.fainelli@...il.com>,
        Bruno Thomsen <bruno.thomsen@...il.com>
Subject: Re: PHY reset question

Hi Oleksij,

On Tue, Oct 6, 2020 at 5:05 AM Oleksij Rempel <o.rempel@...gutronix.de> wrote:
>
> Hello PHY experts,
>
> Short version:
> what is the proper way to handle the PHY reset before identifying PHY?
>
> Long version:
> I stumbled over following issue:
> If PHY reset is registered within PHY node. Then, sometimes,  we will not be
> able to identify it (read PHY ID), because PHY is under reset.
>
> mdio {
>         compatible = "virtual,mdio-gpio";
>
>         [...]
>
>         /* Microchip KSZ8081 */
>         usbeth_phy: ethernet-phy@3 {
>                 reg = <0x3>;
>
>                 interrupts-extended = <&gpio5 12 IRQ_TYPE_LEVEL_LOW>;
>                 reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
>                 reset-assert-us = <500>;
>                 reset-deassert-us = <1000>;
>         };
>
>         [...]
> };
>
> On simple boards with one PHY per MDIO bus, it is easy to workaround by using
> phy-reset-gpios withing MAC node (illustrated in below DT example), instead of
> using reset-gpios within PHY node (see above DT example).
>
> &fec {
>         [...]
>         phy-mode = "rmii";
>         phy-reset-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
>         [...]

I thought this has been fixed by Bruno's series:
https://www.spinics.net/lists/netdev/msg673611.html

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