[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20201207121238.76dd1304@kicinski-fedora-pc1c0hjn.DHCP.thefacebook.com>
Date: Mon, 7 Dec 2020 12:12:38 -0800
From: Jakub Kicinski <kuba@...nel.org>
To: Parav Pandit <parav@...dia.com>
Cc: "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"davem@...emloft.net" <davem@...emloft.net>,
"jacob.e.keller@...el.com" <jacob.e.keller@...el.com>,
Jiri Pirko <jiri@...dia.com>
Subject: Re: [PATCH net-next v4] devlink: Add devlink port documentation
On Mon, 7 Dec 2020 20:00:53 +0000 Parav Pandit wrote:
> > > > Each port is a logically separate ingress/egress point of the device.
> > > >
> > > > ?
> > > This may not be true when both physical ports are under bond.
> >
> > Bonding changes forwarding logic, not what points of egress ASIC has.
> Ok. Do CPU and DSA port also follow same?
Yes, DSA/CPU port types are points of egress to the devlink instance.
Powered by blists - more mailing lists