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Message-ID: <BY5PR12MB4322B5678B9CADFAE5788904DCCE0@BY5PR12MB4322.namprd12.prod.outlook.com>
Date:   Mon, 7 Dec 2020 20:16:03 +0000
From:   Parav Pandit <parav@...dia.com>
To:     Jakub Kicinski <kuba@...nel.org>
CC:     "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "jacob.e.keller@...el.com" <jacob.e.keller@...el.com>,
        Jiri Pirko <jiri@...dia.com>
Subject: RE: [PATCH net-next v4] devlink: Add devlink port documentation



> From: Jakub Kicinski <kuba@...nel.org>
> Sent: Tuesday, December 8, 2020 1:43 AM
> 
> On Mon, 7 Dec 2020 20:00:53 +0000 Parav Pandit wrote:
> > > > > Each port is a logically separate ingress/egress point of the device.
> > > > >
> > > > > ?
> > > > This may not be true when both physical ports are under bond.
> > >
> > > Bonding changes forwarding logic, not what points of egress ASIC has.
> > Ok. Do CPU and DSA port also follow same?
> 
> Yes, DSA/CPU port types are points of egress to the devlink instance.
Ok. got it. Thanks.

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