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Date:   Wed, 9 Dec 2020 21:40:25 -0600
From:   Rob Herring <robh@...nel.org>
To:     Aleksander Jan Bajkowski <olek2@...pl>
Cc:     hauke@...ke-m.de, andrew@...n.ch, vivien.didelot@...il.com,
        f.fainelli@...il.com, olteanv@...il.com, davem@...emloft.net,
        kuba@...nel.org, netdev@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/2] dt-bindings: net: dsa: lantiq, lantiq-gswip: add
 example for xRX330

On Sun, Dec 06, 2020 at 02:27:13PM +0100, Aleksander Jan Bajkowski wrote:
> Add compatible string and example for xRX300 and xRX330.
> 
> Signed-off-by: Aleksander Jan Bajkowski <olek2@...pl>
> ---
>  .../bindings/net/dsa/lantiq-gswip.txt         | 110 +++++++++++++++++-
>  1 file changed, 109 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt b/Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt
> index 886cbe8ffb38..7a90a6a1b065 100644
> --- a/Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt
> +++ b/Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt
> @@ -3,7 +3,8 @@ Lantiq GSWIP Ethernet switches
>  
>  Required properties for GSWIP core:
>  
> -- compatible	: "lantiq,xrx200-gswip" for the embedded GSWIP in the
> +- compatible	: "lantiq,xrx200-gswip", "lantiq,xrx300-gswip" or
> +		  "lantiq,xrx330-gswip" for the embedded GSWIP in the
>  		  xRX200 SoC
>  - reg		: memory range of the GSWIP core registers
>  		: memory range of the GSWIP MDIO registers
> @@ -141,3 +142,110 @@ switch@...8000 {
>  		};
>  	};
>  };
> +
> +Ethernet switch on the GRX330 SoC:

A new compatible string doesn't justify a new example.

Consider converting to DT schema.

> +
> +switch@...8000 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	compatible = "lantiq,xrx300-gswip";
> +	reg = <	0xe108000 0x3100	/* switch */
> +		0xe10b100 0xd8		/* mdio */
> +		0xe10b1d8 0x130		/* mii */
> +		>;
> +	dsa,member = <0 0>;
> +
> +	ports {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		port@1 {
> +			reg = <1>;
> +			label = "lan1";
> +			phy-mode = "internal";
> +			phy-handle = <&phy1>;
> +		};
> +
> +		port@2 {
> +			reg = <2>;
> +			label = "lan2";
> +			phy-mode = "internal";
> +			phy-handle = <&phy2>;
> +		};
> +
> +		port@3 {
> +			reg = <3>;
> +			label = "lan3";
> +			phy-mode = "internal";
> +			phy-handle = <&phy3>;
> +		};
> +
> +		port@4 {
> +			reg = <4>;
> +			label = "lan4";
> +			phy-mode = "internal";
> +			phy-handle = <&phy4>;
> +		};
> +
> +		port@6 {
> +			reg = <0x6>;
> +			label = "cpu";
> +			ethernet = <&eth0>;
> +		};
> +	};
> +
> +	mdio {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		compatible = "lantiq,xrx200-mdio";
> +		reg = <0>;
> +
> +		phy1: ethernet-phy@1 {
> +			reg = <0x1>;
> +		};
> +		phy2: ethernet-phy@2 {
> +			reg = <0x2>;
> +		};
> +		phy3: ethernet-phy@3 {
> +			reg = <0x3>;
> +		};
> +		phy4: ethernet-phy@4 {
> +			reg = <0x4>;
> +		};
> +	};
> +
> +	gphy-fw {
> +		compatible = "lantiq,xrx330-gphy-fw", "lantiq,gphy-fw";
> +		lantiq,rcu = <&rcu0>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		gphy@20 {
> +			reg = <0x20>;
> +
> +			resets = <&reset0 31 30>;
> +			reset-names = "gphy";
> +		};
> +
> +		gphy@68 {
> +			reg = <0x68>;
> +
> +			resets = <&reset0 29 28>;
> +			reset-names = "gphy";
> +		};
> +
> +		gphy@ac {
> +			reg = <0xac>;
> +
> +			resets = <&reset0 28 13>;
> +			reset-names = "gphy";
> +		};
> +
> +		gphy@264 {
> +			reg = <0x264>;
> +
> +			resets = <&reset0 10 10>;
> +			reset-names = "gphy";
> +		};
> +	};
> +};
> -- 
> 2.20.1
> 

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