Date:   Mon, 1 Feb 2021 16:26:36 -0800
From:   Florian Fainelli <f.fainelli@...il.com>
To:     Vladimir Oltean <olteanv@...il.com>
Cc:     netdev <netdev@...r.kernel.org>
Subject: Re: About PHY_INTERFACE_MODE_REVMII

On 2/1/21 1:45 PM, Vladimir Oltean wrote:
> Hi Florian,
> 
> I was looking at
> 
>   commit 2cc70ba4cf5f97a7cf08063d2fae693d36b462eb
>   Author: Florian Fainelli <f.fainelli@...il.com>
>   Date:   Tue May 28 04:07:21 2013 +0000
> 
>       phy: add reverse MII PHY connection type
> 
>       The PHY library currently does not know about the the reverse MII
>       connection type. Add it to the list of supported PHY modes and update
>       of_get_phy_mode() to support it and look for the string "rev-mii".
> 
>       Signed-off-by: Florian Fainelli <f.fainelli@...il.com>
>       Signed-off-by: David S. Miller <davem@...emloft.net>
> 
> and I couldn't figure out its intended use from the drivers that do make
> use of it.
> 
> As far as I understand
> https://www.eetimes.com/reverse-media-independent-interface-revmii-block-architecture/#
> RevMII is a set of hardware state machines used to describe a MAC-to-MAC
> connection in a richer manner than a fixed-link would. You mostly get
> auto-negotiation via a minimal clause 28 state machine, which should
> help avoid mismatch of link modes. You also get the illusion of a clause
> 22 register map that should work with the genphy driver and give you
> link status based on (?!) the link partner toggling BMCR_ANRESTART, for
> the most part - which would allow you to catch a change in their link
> mode advertisement.
> 
> The thing is, RevMII as I understand it is simply the state machines for
> autoneg and the virtual MDIO interface. RevMII is not a data link
> protocol, is it? So why does PHY_INTERFACE_MODE_REVMII exist? Having
> RevMII for the MDIO link management doesn't mean you don't have MII, or
> RMII, or RGMII, or whatever, for the actual data link.
> 
> Another thing is, I think there's one fundamental thing that RevMII
> can't abstract away behind that genphy-compatible clause 22 register
> map. That is whether you're on the 'PHY' side of the RevMII block or on
> the 'MAC' side of it. I think mostly small embedded devices would
> implement a RevMII block in order to disguise themselves as real PHYs to
> whatever the real SoC that connects to them is. But the underlying data
> link is fundamentally asymmetrical any way you look at it. For example,
> in the legacy MII protocol, both TX_CLK and RX_CLK are driven by the PHY
> at 25 MHz. This means that two devices that use MII as a data link must
> be aware of their role as a MAC or as a PHY. Same thing with RMII, where
> the 50 MHz clock signals are either driven by the MAC or by an external
> oscillator (but not by the PHY).
> 
> The point is that if the system implementing the RevMII block (not the
> one connected over real MDIO to it) is running Linux, this creates an
> apparent paradox. The MAC driver will think it's connected to a PHY, but
> nonetheless, the MAC must operate in the role of a PHY. This is the
> description of a PHY-to-PHY setup, something which doesn't make sense.

It depends on the level of control that you have and expect more on that
below.

> I.e. the MAC driver supports RMII. If it's attached to an RMII PHY it
> should operate as a MAC, drive the 50 MHz clock. Except when that RMII
> PHY is actually a virtual RevMII PHY and we're on the local side of it,
> then everything is in reverse and we should actually not drive the 50
> MHz clock because we're the PHY. But if we're on the remote side of the
> RevMII PHY, things are again normal and we should do whatever a RMII MAC
> does, not what a RMII PHY does.
> 
> Consider the picture below.
> 
>  +--------------------------+                    +--------------------------+
>  |Linux    +----+------+----+           MDIO/MDC |-----------+      Linux   |
>  |box A    |Side|RevMII|Side|<-------------------|    MDIO   |      box B   |
>  |      +--| A  |block | B  |<-------------------|controller |              |
>  |      |  +----+------+----+                    |-----------+              |
>  |      |                   |                    |        |                 |
>  |   internal               |                    |     phy-handle           |
>  |    MDIO                  |Actual data link    |                          |
>  |      |            +------|<-------------------|------+                   |
>  |  phy-handle       | MAC  |<-------------------| MAC  |                   |
>  |                   |as PHY|------------------->|as MAC|                   |
>  |                   +------|------------------->|------+                   |
>  |                          |MII/RMII/RGMII/SGMII|                          |
>  +--------------------------+                    +--------------------------+
> 
> The RevMII block implemented by the hardware on Linux box A has two
> virtual register maps compatible with a clause 22 gigabit PHY, called
> side A and side B. Presumably same PHY ID is presented to both sides, so
> both box A and box B load the same PHY driver (let that be genphy).
> But the actual data link is RMII, which is asymmetric in roles (all MII
> protocols are asymmetric in roles to some degree, even RGMII which does
> support in-band signaling driven by the PHY, even SGMII where the same
> thing is true). So somebody must tell Linux box A to configure the MAC
> as a PHY, and Linux box B to configure the MAC as a MAC. Who tells them
> that? I thought PHY_INTERFACE_MODE_REVMII was supposed to help, but I
> just don't see how - the information about the underlying data link type
> is just lost.

That is true if we consider that you can use an electrical connection
other than MII, which was the flaw in the reasoning leading to introduce
the above commit. If you took the name reverse MII literally like I did,
you would not think it would apply to anything but MII and maybe reduced
MII, but not GMII or RGMII. More on that below.

> 
> Is it the case that the hardware on Linux box A is just supposed to hide
> that it's really using RGMII/RMII/MII with a PHY role as the actual data
> link, and just give that a pretty name "RevMII" aka "none of your business"?
> But again I don't believe that to be true, somebody still has to care at
> some point about protocol specific things, like RGMII delays, or
> clocking setup at 25 or 50 or 125 MHz depending on whether MII or RMII
> or RGMII is used, whether to generate inband signaling and wait for ACK,
> etc etc.

I don't believe I ever saw a system that used reverse MII and yet did
not use either plain MII as far as the electrical connections went. That
does not mean you could not electrically connect these two systems using
RMII, GMII or something else. With RGMII, I don't see the point in using
a RevMII block especially as far as clocking goes, both link partners
can have their own local clock and just do clock recovery upon receive.

When this commit was done, the only use case that had to be supported
was the case of two Ethernet MACs (one a video decoder, the other a
cable modem) connected over a MII electrical connection and we could not
change the cable modem side, so we act to make ourselves "look like" a
PHY which the hardware supported. Back then the GENET driver was just
getting a facelift to use PHYLIB and so it still used a fixed-link plus
phy-mode = "rev-mii" to get that mode to work which was probably too big
of a shortcut in addition to the flaw in the reasoning about what RevMII
really was.

If you would like to deprecate/warn when using PHY_INTERFACE_MODE_REVMII
value and come up with a better way to represent such links, no issues
with me, it looks like we have a few in tree users to convert.
-- 
Florian

Powered by blists - more mailing lists