lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Sat, 13 Feb 2021 19:01:44 -0800
From:   Florian Fainelli <f.fainelli@...il.com>
To:     Vladimir Oltean <olteanv@...il.com>,
        "David S . Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>, netdev@...r.kernel.org
Cc:     Andrew Lunn <andrew@...n.ch>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Richard Cochran <richardcochran@...il.com>,
        Claudiu Manoil <claudiu.manoil@....com>,
        Alexandre Belloni <alexandre.belloni@...tlin.com>,
        Vladimir Oltean <vladimir.oltean@....com>,
        Maxim Kochetkov <fido_max@...ox.ru>,
        UNGLinuxDriver@...rochip.com
Subject: Re: [PATCH v2 net-next 11/12] net: dsa: felix: setup MMIO filtering
 rules for PTP when using tag_8021q



On 2/13/2021 14:38, Vladimir Oltean wrote:
> From: Vladimir Oltean <vladimir.oltean@....com>
> 
> Since the tag_8021q tagger is software-defined, it has no means by
> itself for retrieving hardware timestamps of PTP event messages.
> 
> Because we do want to support PTP on ocelot even with tag_8021q, we need
> to use the CPU port module for that. The RX timestamp is present in the
> Extraction Frame Header. And because we can't use NPI mode which redirects
> the CPU queues to an "external CPU" (meaning the ARM CPU running Linux),
> then we need to poll the CPU port module through the MMIO registers to
> retrieve TX and RX timestamps.
> 
> Sadly, on NXP LS1028A, the Felix switch was integrated into the SoC
> without wiring the extraction IRQ line to the ARM GIC. So, if we want to
> be notified of any PTP packets received on the CPU port module, we have
> a problem.
> 
> There is a possible workaround, which is to use the Ethernet CPU port as
> a notification channel that packets are available on the CPU port module
> as well. When a PTP packet is received by the DSA tagger (without timestamp,
> of course), we go to the CPU extraction queues, poll for it there, then
> we drop the original Ethernet packet and masquerade the packet retrieved
> over MMIO (plus the timestamp) as the original when we inject it up the
> stack.
> 
> Create a quirk in struct felix is selected by the Felix driver (but not
> by Seville, since that doesn't support PTP at all). We want to do this
> such that the workaround is minimally invasive for future switches that
> don't require this workaround.
> 
> The only traffic for which we need timestamps is PTP traffic, so add a
> redirection rule to the CPU port module for this. Currently we only have
> the need for PTP over L2, so redirection rules for UDP ports 319 and 320
> are TBD for now.
> 
> Note that for the workaround of matching of PTP-over-Ethernet-port with
> PTP-over-MMIO queues to work properly, both channels need to be
> absolutely lossless. There are two parts to achieving that:
> - We keep flow control enabled on the tag_8021q CPU port
> - We put the DSA master interface in promiscuous mode, so it will never
>    drop a PTP frame (for the profiles we are interested in, these are
>    sent to the multicast MAC addresses of 01-80-c2-00-00-0e and
>    01-1b-19-00-00-00).
> 
> Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>

Reviewed-by: Florian Fainelli <f.fainelli@...il.com>
-- 
Florian

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ