netdev - Re: [PATCH devicetree] arm64: dts: ls1028a: set up the real link speed for ENETC port 2

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Date:   Mon, 15 Mar 2021 14:01:21 +0800
From:   Shawn Guo <shawnguo@...nel.org>
To:     Vladimir Oltean <olteanv@...il.com>
Cc:     linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        netdev@...r.kernel.org,
        Alex Marginean <alexandru.marginean@....com>,
        Claudiu Manoil <claudiu.manoil@....com>,
        Michael Walle <michael@...le.cc>,
        Vladimir Oltean <vladimir.oltean@....com>
Subject: Re: [PATCH devicetree] arm64: dts: ls1028a: set up the real link
 speed for ENETC port 2

On Mon, Mar 08, 2021 at 03:08:34PM +0200, Vladimir Oltean wrote:
> From: Vladimir Oltean <vladimir.oltean@....com>
> 
> In NXP LS1028A there is a MAC-to-MAC internal link between enetc_port2
> and mscc_felix_port4. This link operates at 2.5Gbps and is described as
> such for the mscc_felix_port4 node.
> 
> The reason for the discrepancy is a limitation in the PHY library
> support for fixed-link nodes. Due to the fact that the PHY library
> registers a software PHY which emulates the clause 22 register map, the
> drivers/net/phy/fixed_phy.c driver only supports speeds up to 1Gbps.
> 
> The mscc_felix_port4 node is probed by DSA, which does not use the PHY
> library directly, but phylink, and phylink has a different representation
> for fixed-link nodes, one that does not have the limitation of not being
> able to represent speeds > 1Gbps.
> 
> Since the enetc driver was converted to phylink too as of commit
> 71b77a7a27a3 ("enetc: Migrate to PHYLINK and PCS_LYNX"), the limitation
> has been practically lifted there too, and we can describe the real link
> speed in the device tree now.
> 
> Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>

Applied, thanks.