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Message-ID: <a5c0e846-c838-83b8-9c85-34b3f53dc54e@gmail.com>
Date: Thu, 25 Mar 2021 11:09:01 -0700
From: Florian Fainelli <f.fainelli@...il.com>
To: Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
hauke@...ke-m.de, netdev@...r.kernel.org
Cc: linux-kernel@...r.kernel.org, andrew@...n.ch,
vivien.didelot@...il.com, olteanv@...il.com, davem@...emloft.net,
kuba@...nel.org
Subject: Re: [PATCH net] net: dsa: lantiq_gswip: Let GSWIP automatically set
the xMII clock
On 3/24/2021 12:36 PM, Martin Blumenstingl wrote:
> The xMII interface clock depends on the PHY interface (MII, RMII, RGMII)
> as well as the current link speed. Explicitly configure the GSWIP to
> automatically select the appropriate xMII interface clock.
>
> This fixes an issue seen by some users where ports using an external
> RMII or RGMII PHY were deaf (no RX or TX traffic could be seen). Most
> likely this is due to an "invalid" xMII clock being selected either by
> the bootloader or hardware-defaults.
>
> Fixes: 14fceff4771e51 ("net: dsa: Add Lantiq / Intel DSA driver for vrx200")
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Reviewed-by: Florian Fainelli <f.fainelli@...il.com>
> ---
> It would be great to have this fix backported to Linux 5.4 and 5.10 to
> get rid of one more blocker which prevents OpenWrt from switching to
> this new in-tree driver.
Given there is a Fixes: tag this should land at some point in the stable
tree auto-selection. Stable fixes for networking patches follows a
slightly different path:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/networking/netdev-FAQ.rst#n145
>
>
> drivers/net/dsa/lantiq_gswip.c | 9 +++++++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/dsa/lantiq_gswip.c b/drivers/net/dsa/lantiq_gswip.c
> index 52e865a3912c..809dfa3be6bb 100644
> --- a/drivers/net/dsa/lantiq_gswip.c
> +++ b/drivers/net/dsa/lantiq_gswip.c
> @@ -799,10 +799,15 @@ static int gswip_setup(struct dsa_switch *ds)
> /* Configure the MDIO Clock 2.5 MHz */
> gswip_mdio_mask(priv, 0xff, 0x09, GSWIP_MDIO_MDC_CFG1);
>
> - /* Disable the xMII link */
> - for (i = 0; i < priv->hw_info->max_ports; i++)
> + for (i = 0; i < priv->hw_info->max_ports; i++) {
> + /* Disable the xMII link */
> gswip_mii_mask_cfg(priv, GSWIP_MII_CFG_EN, 0, i);
>
> + /* Automatically select the xMII interface clock */
> + gswip_mii_mask_cfg(priv, GSWIP_MII_CFG_RATE_MASK,
> + GSWIP_MII_CFG_RATE_AUTO, i);
> + }
> +
> /* enable special tag insertion on cpu port */
> gswip_switch_mask(priv, 0, GSWIP_FDMA_PCTRL_STEN,
> GSWIP_FDMA_PCTRLp(cpu_port));
>
--
Florian
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