netdev - Re: [PATCH net-next 11/13] net: dsa: sja1105: register the MDIO buses for 100base-T1 and 100base-TX

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Message-ID: <YKz+8QcRS3Px7tZR@lunn.ch>
Date:   Tue, 25 May 2021 15:43:13 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Vladimir Oltean <vladimir.oltean@....com>
Cc:     Vladimir Oltean <olteanv@...il.com>,
        Jakub Kicinski <kuba@...nel.org>,
        "David S. Miller" <davem@...emloft.net>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Russell King <linux@...linux.org.uk>
Subject: Re: [PATCH net-next 11/13] net: dsa: sja1105: register the MDIO
 buses for 100base-T1 and 100base-TX

> Just to be clear, what is your suggestion for this? I am not a great fan
> of 2 internal MDIO buses, but as mentioned, the PHY access procedure is
> different for the 100base-TX and the 100base-T1 PHYs.

Do what the mv88e6xxx driver does. Have two busses, but do not put
them into a container node. You then avoid issues with the yaml
validater and not need the reg values etc.

	  Andrew