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Message-ID: <20210525132117.gvjr4zcmpnhcwxyc@skbuf>
Date:   Tue, 25 May 2021 13:21:17 +0000
From:   Vladimir Oltean <vladimir.oltean@....com>
To:     Andrew Lunn <andrew@...n.ch>
CC:     Vladimir Oltean <olteanv@...il.com>,
        Jakub Kicinski <kuba@...nel.org>,
        "David S. Miller" <davem@...emloft.net>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Russell King <linux@...linux.org.uk>
Subject: Re: [PATCH net-next 11/13] net: dsa: sja1105: register the MDIO buses
 for 100base-T1 and 100base-TX

On Tue, May 25, 2021 at 03:16:52PM +0200, Andrew Lunn wrote:
> > > It however sounds like you have the two busses one level deeper?
> > > 
> > > It would be good if you document this as part of the binding.
> > 
> > Yes, it looks like this:
> > 
> > 	ethernet-switch@2 {
> > 		compatible = "nxp,sja1110a";
> > 
> > 		ethernet-ports {
> > 			...
> > 		};
> > 
> > 		mdio {
> > 			#address-cells = <1>;
> > 			#size-cells = <0>;
> > 
> > 			mdio@0 {
> > 				reg = <0>;
> > 				compatible = "nxp,sja1110-base-t1-mdio";
> > 				#address-cells = <1>;
> > 				#size-cells = <0>;
> > 
> > 				sw2_port5_base_t1_phy: ethernet-phy@1 {
> > 					compatible = "ethernet-phy-ieee802.3-c45";
> > 					reg = <0x1>;
> > 				};
> > 
> > 				...
> > 			};
> > 
> 
> We should run this by Rob.
> 
> That is probably not the intention of
> Documentation/devicetree/bindings/net/mdio.yaml, it works because of
> additionalProperties: true
> 
> What meaning does reg have, in mdio@0?

None apart from "not the other MDIO bus".
I haven't run this through the DT validator yet, I am doing that right
now and will copy Rob to the next patch series.
Just to be clear, what is your suggestion for this? I am not a great fan
of 2 internal MDIO buses, but as mentioned, the PHY access procedure is
different for the 100base-TX and the 100base-T1 PHYs.

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