netdev - Re: [PATCH v2 net-next 1/4] net: phy: introduce PHY_INTERFACE_MODE

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <60ff376d-9f28-52fb-8d6d-5e3966258de6@gmail.com>
Date:   Fri, 4 Jun 2021 09:43:17 -0700
From:   Florian Fainelli <f.fainelli@...il.com>
To:     Vladimir Oltean <olteanv@...il.com>,
        Jakub Kicinski <kuba@...nel.org>,
        "David S. Miller" <davem@...emloft.net>,
        Rob Herring <robh+dt@...nel.org>
Cc:     devicetree@...r.kernel.org, netdev@...r.kernel.org,
        Andrew Lunn <andrew@...n.ch>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Russell King - ARM Linux admin <linux@...linux.org.uk>,
        Vladimir Oltean <vladimir.oltean@....com>
Subject: Re: [PATCH v2 net-next 1/4] net: phy: introduce
 PHY_INTERFACE_MODE_REVRMII



On 6/4/2021 7:01 AM, Vladimir Oltean wrote:
> From: Vladimir Oltean <vladimir.oltean@....com>
> 
> The "reverse RMII" protocol name is a personal invention, derived from
> "reverse MII".
> 
> Just like MII, RMII is an asymmetric protocol in that a PHY behaves
> differently than a MAC. In the case of RMII, for example:
> - the 50 MHz clock signals are either driven by the MAC or by an
>   external oscillator (but never by the PHY).
> - the PHY can transmit extra in-band control symbols via RXD[1:0] which
>   the MAC is supposed to understand, but a PHY isn't.
> 
> The "reverse MII" protocol is not standardized either, except for this
> web document:
> https://www.eetimes.com/reverse-media-independent-interface-revmii-block-architecture/#
> 
> In short, it means that the Ethernet controller speaks the 4-bit data
> parallel protocol from the perspective of a PHY (it acts like a PHY).
> This might mean that it implements clause 22 compatible registers,
> although that is optional - the important bit is that its pins can be
> connected to an MII MAC and it will 'just work'.
> 
> In this discussion thread:
> https://lore.kernel.org/netdev/20210201214515.cx6ivvme2tlquge2@skbuf/
> 
> we agreed that it would be an abuse of terms to use the "RevMII" name
> for anything than the 4-bit parallel MII protocol. But since all the
> same concepts can be applied to the 2-bit Reduced MII protocol as well,
> here we are introducing a "Reverse RMII" protocol. This means: "behave
> like an RMII PHY".
> 
> Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>

Acked-by: Florian Fainelli <f.fainelli@...il.com>
-- 
Florian