netdev - Re: [PATCH v2 net-next 3/3] net: phy: nxp-c45-tja11xx: enable MDIO write access to the master/slave registers

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Message-ID: <20210614125108.GT22278@shell.armlinux.org.uk>
Date:   Mon, 14 Jun 2021 13:51:09 +0100
From:   "Russell King (Oracle)" <linux@...linux.org.uk>
To:     Vladimir Oltean <olteanv@...il.com>
Cc:     Jakub Kicinski <kuba@...nel.org>,
        "David S. Miller" <davem@...emloft.net>, netdev@...r.kernel.org,
        Florian Fainelli <f.fainelli@...il.com>,
        Andrew Lunn <andrew@...n.ch>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Radu Pirea <radu-nicolae.pirea@....nxp.com>,
        Vladimir Oltean <vladimir.oltean@....com>
Subject: Re: [PATCH v2 net-next 3/3] net: phy: nxp-c45-tja11xx: enable MDIO
 write access to the master/slave registers

On Mon, Jun 14, 2021 at 03:38:15PM +0300, Vladimir Oltean wrote:
> From: Vladimir Oltean <vladimir.oltean@....com>
> 
> The SJA1110 switch integrates TJA1103 PHYs, but in SJA1110 switch rev B
> silicon, there is a bug in that the registers for selecting the 100base-T1
> autoneg master/slave roles are not writable.
> 
> To enable write access to the master/slave registers, these additional
> PHY writes are necessary during initialization.
> 
> The issue has been corrected in later SJA1110 silicon versions and is
> not present in the standalone PHY variants, but applying the workaround
> unconditionally in the driver should not do any harm.
> 
> Suggested-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@....nxp.com>
> Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>

Reviewed-by: Russell King (Oracle) <rmk+kernel@...linux.org.uk>

-- 
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