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Message-ID: <6068f6ab-1521-48be-20a6-f8a30ad75d3f@maxlinear.com>
Date:   Tue, 29 Jun 2021 16:05:33 +0000
From:   Liang Xu <lxu@...linear.com>
To:     Andrew Lunn <andrew@...n.ch>
CC:     "hkallweit1@...il.com" <hkallweit1@...il.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "kuba@...nel.org" <kuba@...nel.org>,
        "vee.khee.wong@...ux.intel.com" <vee.khee.wong@...ux.intel.com>,
        "linux@...linux.org.uk" <linux@...linux.org.uk>,
        Hauke Mehrtens <hmehrtens@...linear.com>,
        Thomas Mohren <tmohren@...linear.com>,
        "mohammad.athari.ismail@...el.com" <mohammad.athari.ismail@...el.com>
Subject: Re: [PATCH v4 2/2] net: phy: add Maxlinear GPY115/21x/24x driver

On 29/6/2021 10:58 pm, Andrew Lunn wrote:
> This email was sent from outside of MaxLinear.
>
>
>> +static int gpy_config_aneg(struct phy_device *phydev)
>> +{
>> +     bool changed = false;
>> +     u32 adv;
>> +     int ret;
>> +
>> +     if (phydev->autoneg == AUTONEG_DISABLE) {
>> +             /* Configure half duplex with genphy_setup_forced,
>> +              * because genphy_c45_pma_setup_forced does not support.
>> +              */
>> +             return phydev->duplex != DUPLEX_FULL
>> +                     ? genphy_setup_forced(phydev)
>> +                     : genphy_c45_pma_setup_forced(phydev);
>> +     }
>> +
>> +     ret = genphy_c45_an_config_aneg(phydev);
>> +     if (ret < 0)
>> +             return ret;
>> +     if (ret > 0)
>> +             changed = true;
>> +
>> +     adv = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising);
>> +     ret = phy_modify_changed(phydev, MII_CTRL1000,
>> +                              ADVERTISE_1000FULL | ADVERTISE_1000HALF,
>> +                              adv);
>> +     if (ret < 0)
>> +             return ret;
>> +     if (ret > 0)
>> +             changed = true;
>> +
>> +     ret = genphy_c45_check_and_restart_aneg(phydev, changed);
>> +     if (ret < 0)
>> +             return ret;
>> +
>> +     if (phydev->interface == PHY_INTERFACE_MODE_USXGMII ||
>> +         phydev->interface == PHY_INTERFACE_MODE_INTERNAL)
>> +             return 0;
>> +
>> +     /* No need to trigger re-ANEG if SGMII link speed is 2.5G
>> +      * or SGMII ANEG is disabled.
>> +      */
> Is this correct. Are you using SGMII at 2.5G, or should this comment
> be 2500BaseX?
>
> Otherwise, this looks good now.
>
>     Andrew
>
Can I change to "if link speed is 2.5G"?


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