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Message-Id: <20210809085213.324129-1-chaochao2021666@163.com>
Date:   Mon,  9 Aug 2021 16:52:13 +0800
From:   chaochao2021666@....com
To:     davem@...emloft.net, kuba@...nel.org, robh+dt@...nel.org
Cc:     netdev@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, Chao Zeng <chao.zeng@...mens.com>
Subject: [PATCH 1/2] dt-bindings:dp83867:Add binding for the status led

From: Chao Zeng <chao.zeng@...mens.com>

The phy status led of each of board maybe different.
Provide a method to custom phy status led behavior.

Datasheet:
http://www.ti.com/product/DP83867IR/datasheet

Signed-off-by: Chao Zeng <chao.zeng@...mens.com>
---
 .../devicetree/bindings/net/ti,dp83867.yaml    |  6 ++++++
 include/dt-bindings/net/ti-dp83867.h           | 18 ++++++++++++++++++
 2 files changed, 24 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/ti,dp83867.yaml b/Documentation/devicetree/bindings/net/ti,dp83867.yaml
index 047d757e8d82..a46a437818f2 100644
--- a/Documentation/devicetree/bindings/net/ti,dp83867.yaml
+++ b/Documentation/devicetree/bindings/net/ti,dp83867.yaml
@@ -106,6 +106,12 @@ properties:
       Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h for applicable
       values.
 
+  ti,led-sel:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: |
+      This configure the status led. See dt-bindings/net/ti-dp83867.h
+      for different status led settings,select different configures
+
 required:
   - reg
 
diff --git a/include/dt-bindings/net/ti-dp83867.h b/include/dt-bindings/net/ti-dp83867.h
index 6fc4b445d3a1..de59c3a42c1e 100644
--- a/include/dt-bindings/net/ti-dp83867.h
+++ b/include/dt-bindings/net/ti-dp83867.h
@@ -48,6 +48,24 @@
 #define DP83867_CLK_O_SEL_CHN_C_TCLK		0xA
 #define DP83867_CLK_O_SEL_CHN_D_TCLK		0xB
 #define DP83867_CLK_O_SEL_REF_CLK		0xC
+
+/* Led configuration flag*/
+#define DP83867_LINK_ESTABLISHED				0x0
+#define DP83867_RECEIVE_TRANSMIT_ACTIVITY		0x1
+#define DP83867_TRANSMIT_ACTIVITY				0x2
+#define DP83867_RECEIVE_ACTIVITY				0x3
+#define DP83867_COLLISION_DETECTED				0x4
+#define DP83867_LINK_ESTABLISHED_1000BT			0x5
+#define DP83867_LINK_ESTABLISHED_100BTX			0x6
+#define DP83867_LINK_ESTABLISHED_10BT			0x7
+#define DP83867_LINK_ESTABLISHED_10_100_BT		0x8
+#define DP83867_LINK_ESTABLISHED_100_1000_BT	0x9
+#define DP83867_FULL_DUPLEX						0xA
+#define DP83867_LINK_ESTABLISHED_BLINK_TRANSMIT_RECEIVE 0xB
+#define DP83867_RESERVED						0xC
+#define DP83867_RECEIVE_TRANSMIT_ERROR			0xD
+#define DP83867_RECEIVE_ERROR					0xE
+
 /* Special flag to indicate clock should be off */
 #define DP83867_CLK_O_SEL_OFF			0xFFFFFFFF
 #endif
-- 
2.32.0


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