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Message-ID: <YUyKn19mJm8tizw+@lunn.ch>
Date: Thu, 23 Sep 2021 16:09:35 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Geert Uytterhoeven <geert@...ux-m68k.org>
Cc: Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
Biju Das <biju.das.jz@...renesas.com>,
Florian Fainelli <f.fainelli@...il.com>,
Adam Ford <aford173@...il.com>,
Grygorii Strashko <grygorii.strashko@...com>,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
netdev <netdev@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>
Subject: Re: [PATCH 0/9] renesas: Add compatible properties to Ethernet PHY
nodes
On Thu, Sep 23, 2021 at 01:00:11PM +0200, Geert Uytterhoeven wrote:
> On Thu, Sep 9, 2021 at 10:49 AM Geert Uytterhoeven
> <geert+renesas@...der.be> wrote:
> > If an Ethernet PHY reset is asserted when the Ethernet driver is
> > initialized, the PHY cannot be probed:
> >
> > mdio_bus ee700000.ethernet-ffffffff: MDIO device at address 1 is missing
> >
> > This happens because the Linux PHY subsystem tries to read the PHY
> > Identifier registers before handling PHY reset. Hence if the PHY reset
> > was asserted before, identification fails.
> >
> > An easy way to reproduce this issue is by using kexec to launch a new
> > kernel (the PHY reset will be asserted before starting the new kernel),
> > or by unbinding and rebinding the Ethernet driver (the PHY reset will be
> > asserted during unbind), e.g. on koelsch:
> >
> > echo ee700000.ethernet > /sys/bus/platform/drivers/sh-eth/unbind
> > $ echo ee700000.ethernet > /sys/bus/platform/drivers/sh-eth/bind
> >
> > The recommended approach[1][2] seems to be working around this issue by
> > adding compatible values to all ethernet-phy nodes, so Linux can
> > identify the PHY at any time, without reading the PHY ID from the
> > device, and regardless of the state of the PHY reset line.
> >
> > Hence this patch series adds such compatible values to all Ethernet PHY
> > subnodes representing PHYs on all boards with Renesas ARM and ARM64
> > SoCs. For easier review, I have split the series in one patch per PHY
> > model.
It is a reasonable approach.
Reviewed-by: Andrew Lunn <andrew@...n.ch>
Andrew
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