netdev - RE: [PATCH net-next v3 13/14] ravb: Update ravb_emac_init

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Message-ID: <OS0PR01MB592286B6E3CBDC31514A9B6C86B79@OS0PR01MB5922.jpnprd01.prod.outlook.com>
Date:   Wed, 13 Oct 2021 06:14:55 +0000
From:   Biju Das <biju.das.jz@...renesas.com>
To:     Biju Das <biju.das.jz@...renesas.com>,
        Sergei Shtylyov <sergei.shtylyov@...il.com>,
        Sergey Shtylyov <s.shtylyov@....ru>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>
CC:     Geert Uytterhoeven <geert+renesas@...der.be>,
        Sergey Shtylyov <s.shtylyov@...russia.ru>,
        Adam Ford <aford173@...il.com>, Andrew Lunn <andrew@...n.ch>,
        Yuusuke Ashizuka <ashiduka@...itsu.com>,
        Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-renesas-soc@...r.kernel.org" 
        <linux-renesas-soc@...r.kernel.org>,
        Chris Paterson <Chris.Paterson2@...esas.com>,
        Biju Das <biju.das@...renesas.com>,
        Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: RE: [PATCH net-next v3 13/14] ravb: Update ravb_emac_init_gbeth()

Hi Sergey,

> Subject: RE: [PATCH net-next v3 13/14] ravb: Update ravb_emac_init_gbeth()
> 
> Hi Sergey,
> 
> Thanks for the feedback.
> 
> > Subject: Re: [PATCH net-next v3 13/14] ravb: Update
> > ravb_emac_init_gbeth()
> >
> > On 10/12/21 9:23 PM, Biju Das wrote:
> >
> > >>>>> This patch enables Receive/Transmit port of TOE and removes the
> > >>>>> setting of promiscuous bit from EMAC configuration mode register.
> > >>>>>
> > >>>>> This patch also update EMAC configuration mode comment from
> > >>>>> "PAUSE prohibition" to "EMAC Mode: PAUSE prohibition; Duplex;
> > >>>>> TX; RX; CRC Pass Through".
> > >>>>
> > >>>>    I'm not sure why you set ECMR.RCPT while you don't have the
> > >>>> checksum offloaded...
> > >>>>
> > >>>>> Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
> > >>>>> ---
> > >>>>> v2->v3:
> > >>>>>  * Enabled TPE/RPE of TOE, as disabling causes loopback test to
> > >>>>> fail
> > >>>>>  * Documented CSR0 register bits
> > >>>>>  * Removed PRM setting from EMAC configuration mode
> > >>>>>  * Updated EMAC configuration mode.
> > >>>>> v1->v2:
> > >>>>>  * No change
> > >>>>> V1:
> > >>>>>  * New patch.
> > >>>>> ---
> > >>>>>  drivers/net/ethernet/renesas/ravb.h      | 6 ++++++
> > >>>>>  drivers/net/ethernet/renesas/ravb_main.c | 5 +++--
> > >>>>>  2 files changed, 9 insertions(+), 2 deletions(-)
> > >>>>>
> > >>>>> diff --git a/drivers/net/ethernet/renesas/ravb.h
> > >>>>> b/drivers/net/ethernet/renesas/ravb.h
> > >>>>> index 69a771526776..08062d73df10 100644
> > >>>>> --- a/drivers/net/ethernet/renesas/ravb.h
> > >>>>> +++ b/drivers/net/ethernet/renesas/ravb.h
> > >>>>> @@ -204,6 +204,7 @@ enum ravb_reg {
> > >>>>>  	TLFRCR	= 0x0758,
> > >>>>>  	RFCR	= 0x0760,
> > >>>>>  	MAFCR	= 0x0778,
> > >>>>> +	CSR0    = 0x0800,	/* RZ/G2L only */
> > >>>>>  };
> > >>>>>
> > >>>>>
> > >>>>> @@ -964,6 +965,11 @@ enum CXR31_BIT {
> > >>>>>  	CXR31_SEL_LINK1	= 0x00000008,
> > >>>>>  };
> > >>>>>
> > >>>>> +enum CSR0_BIT {
> > >>>>> +	CSR0_TPE	= 0x00000010,
> > >>>>> +	CSR0_RPE	= 0x00000020,
> > >>>>> +};
> > >>>>> +
> > >>>>
> > >>>>   Is this really needed if you have ECMR.RCPT cleared?
> > >>>
> > >>> Yes it is required. Please see the current log and log with the
> > >>> changes you suggested
> > >>>
> > >>> root@...rc-rzg2l:/rzg2l-test-scripts# ./eth_t_001.sh
> > >>> [   39.646891] ravb 11c20000.ethernet eth0: Link is Down
> > >>> [   39.715127] ravb 11c30000.ethernet eth1: Link is Down
> > >>> [   39.895680] Microchip KSZ9131 Gigabit PHY 11c20000.ethernet-
> > >> ffffffff:07: attached PHY driver
> > >> (mii_bus:phy_addr=11c20000.ethernet-
> > >> ffffffff:07, irq=POLL)
> > >>> [   39.966370] Microchip KSZ9131 Gigabit PHY 11c30000.ethernet-
> > >> ffffffff:07: attached PHY driver
> > >> (mii_bus:phy_addr=11c30000.ethernet-
> > >> ffffffff:07, irq=POLL)
> > >>> [   42.988573] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes
> ready
> > >>> [   42.995119] ravb 11c20000.ethernet eth0: Link is Up - 1Gbps/Full
> -
> > >> flow control off
> > >>> [   43.052541] IPv6: ADDRCONF(NETDEV_CHANGE): eth1: link becomes
> ready
> > >>> [   43.055710] ravb 11c30000.ethernet eth1: Link is Up - 1Gbps/Full
> -
> > >> flow control off
> > >>>
> > >>> EXIT|PASS||[422391:43:00] ||
> > >>>
> > >>> root@...rc-rzg2l:/rzg2l-test-scripts#
> > >>>
> > >>>
> > >>> with the changes you suggested
> > >>> ----------------------------
> > >>>
> > >>> root@...rc-rzg2l:/rzg2l-test-scripts# ./eth_t_001.sh
> > >>> [   23.300520] ravb 11c20000.ethernet eth0: Link is Down
> > >>> [   23.535604] ravb 11c30000.ethernet eth1: device will be stopped
> > after
> > >> h/w processes are done.
> > >>> [   23.547267] ravb 11c30000.ethernet eth1: Link is Down
> > >>> [   23.802667] Microchip KSZ9131 Gigabit PHY 11c20000.ethernet-
> > >> ffffffff:07: attached PHY driver
> > >> (mii_bus:phy_addr=11c20000.ethernet-
> > >> ffffffff:07, irq=POLL)
> > >>> [   24.031711] ravb 11c30000.ethernet eth1: failed to switch device
> to
> > >> config mode
> > >>> RTNETLINK answers: Connection timed out
> > >>>
> > >>> EXIT|FAIL||[422391:42:32] Failed to bring up ETH1||
> > >>>
> > >>> root@...rc-rzg2l:/rzg2l-test-scripts#
> > >>
> > >>    Hm... :-/
> > >>    What if you only clear ECMR.RCPT but continue to set CSR0?
> > >
> > > We already seen, RCPT=0, RCSC=1 with similar Hardware checksum
> > > function like R-Car, System crashes.
> >
> >    I didn't tell you to set ECMR.RCSC this time. :-)
> 
> Theoretically, It should work as it is. As we are not doing any hardware
> checksum,
> 
> H/W is just passing RX CSUM to TOE without any software intervention.
> 
> It is clearly mentioned in data sheet, it is HW controlled.
> 
> 25 RCPT B’0 R/W Reception CRC Pass Through
> 1: CRC of received frame is transferred to TOE.
> RCSC (auto calculation of checksum of received frame data part) function
> is disabled at this time.
> 0: CRC of received frame is not transferred to TOE.
> 

The board doesn't boot with NFS, if I take out RCPT. So it is needed