lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <1335eea9-463b-3f99-d9bb-ce158a11d03b@nvidia.com>
Date:   Tue, 4 Jan 2022 17:50:32 +0200
From:   Maxim Mikityanskiy <maximmi@...dia.com>
To:     Stanisław Czech <s.czech@...atel.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>
CC:     Maxim Mikityanskiy <maximmi@...lanox.com>
Subject: Re: htb offload support in i40e (intel nic)

On 2021-12-29 21:50, Stanisław Czech wrote:
> Hi,
> 
> I saw that the htb offload needs additional changes in the mlx5 driver to support it.
> I couldn't find any info regarding the htb offload support on any other drivers/vendors like intel
> nic (i40e) We use multiple XL710 that seems to support hardware tc queues:
> 
> qdisc noqueue 0: dev lo root refcnt 2
> qdisc mq 0: dev enp65s0f1 root
> qdisc fq_codel 0: dev enp65s0f1 parent :18 limit 10240p flows 1024 quantum 1514                                                                                                              target 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :17 limit 10240p flows 1024 quantum 1514                                                                                                              target 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :16 limit 10240p flows 1024 quantum 1514                                                                                                              target 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :15 limit 10240p flows 1024 quantum 1514                                                                                                              target 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :14 limit 10240p flows 1024 quantum 1514                                                                                                              target 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :13 limit 10240p flows 1024 quantum 1514                                                                                                              target 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :12 limit 10240p flows 1024 quantum 1514                                                                                                              target 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :11 limit 10240p flows 1024 quantum 1514                                                                                                              target 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :10 limit 10240p flows 1024 quantum 1514                                                                                                              target 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :f limit 10240p flows 1024 quantum 1514 t                                                                                                             arget 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :e limit 10240p flows 1024 quantum 1514 t                                                                                                             arget 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :d limit 10240p flows 1024 quantum 1514 t                                                                                                             arget 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :c limit 10240p flows 1024 quantum 1514 t                                                                                                             arget 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :b limit 10240p flows 1024 quantum 1514 t                                                                                                             arget 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :a limit 10240p flows 1024 quantum 1514 t                                                                                                             arget 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :9 limit 10240p flows 1024 quantum 1514 t                                                                                                             arget 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :8 limit 10240p flows 1024 quantum 1514 t                                                                                                             arget 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :7 limit 10240p flows 1024 quantum 1514 t                                                                                                             arget 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :6 limit 10240p flows 1024 quantum 1514 t                                                                                                             arget 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :5 limit 10240p flows 1024 quantum 1514 t                                                                                                             arget 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :4 limit 10240p flows 1024 quantum 1514 t                                                                                                             arget 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :3 limit 10240p flows 1024 quantum 1514 t                                                                                                             arget 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :2 limit 10240p flows 1024 quantum 1514 t                                                                                                             arget 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> qdisc fq_codel 0: dev enp65s0f1 parent :1 limit 10240p flows 1024 quantum 1514 t                                                                                                             arget 5ms interval 100ms memory_limit 32Mb ecn drop_batch 64
> 
> Is this enough to support the htb offload or we must wait for the driver update to support it?

Hi,

The HTB offload requires hardware and driver support. The NIC has to 
support hierarchical rate limiting, and the driver has to implement the 
API used by sch_htb to communicate the hierarchy. Mellanox NICs starting 
from ConnectX-5 should support the HTB offload (see the original commit 
message for more details).

So far, in-tree drivers other than mlx5 don't implement the HTB API. I'm 
not aware whether the corresponding hardware has the needed capabilities 
- that is a question to developers from Intel.

> 
> 
> Greetings,
> Stanisław Czech
> 
>   
> 

Powered by blists - more mailing lists