netdev - RE: [PATCH net-next] net: lan966x: Improve the CPU TX bitrate.

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Date:   Wed, 9 Mar 2022 09:57:57 +0000
From:   David Laight <David.Laight@...LAB.COM>
To:     'Horatiu Vultur' <horatiu.vultur@...rochip.com>
CC:     Andrew Lunn <andrew@...n.ch>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "UNGLinuxDriver@...rochip.com" <UNGLinuxDriver@...rochip.com>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "kuba@...nel.org" <kuba@...nel.org>
Subject: RE: [PATCH net-next] net: lan966x: Improve the CPU TX bitrate.

From: 'Horatiu Vultur'
> Sent: 09 March 2022 09:11
> 
> The 03/08/2022 22:46, David Laight wrote:
> >
> > From: Horatiu Vultur
> > > Sent: 08 March 2022 22:30
> > >
> > > The 03/08/2022 22:36, Andrew Lunn wrote:
> > > >
> > > > >  static int lan966x_port_inj_ready(struct lan966x *lan966x, u8 grp)
> > > > >  {
> > > > > -     u32 val;
> > > > > +     unsigned long time = jiffies + usecs_to_jiffies(READL_TIMEOUT_US);
> > > > > +     int ret = 0;
> > > > >
> > > > > -     return readx_poll_timeout_atomic(lan966x_port_inj_status, lan966x, val,
> > > > > -                                      QS_INJ_STATUS_FIFO_RDY_GET(val) & BIT(grp),
> > > > > -                                      READL_SLEEP_US, READL_TIMEOUT_US);
> > > > > +     while (!(lan_rd(lan966x, QS_INJ_STATUS) &
> > > > > +              QS_INJ_STATUS_FIFO_RDY_SET(BIT(grp)))) {
> > > > > +             if (time_after(jiffies, time)) {
> > > > > +                     ret = -ETIMEDOUT;
> > > > > +                     break;
> > > > > +             }
> > > >
> > > > Did you try setting READL_SLEEP_US to 0? readx_poll_timeout_atomic()
> > > > explicitly supports that.
> > >
> > > I have tried but it didn't improve. It was the same as before.
> >
> > How many times round the loop is it going ?
> 
> In the tests that I have done, I have never seen entering in the loop.

In which case I'd do an initial status check before even
faffing with 'jiffies'.

It might even be that the status read is so slow that space
is always available by the time it is processed.
PCIe reads can be horribly slow.
Into our fgpa they end up being slower than old ISA bus cycles.
Probably several thousand cpu clocks.

	David

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