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Message-ID: <20220309121632.d77v2x27kfaqiuzo@soft-dev3-1.localhost>
Date: Wed, 9 Mar 2022 13:16:32 +0100
From: 'Horatiu Vultur' <horatiu.vultur@...rochip.com>
To: David Laight <David.Laight@...lab.com>
CC: Andrew Lunn <andrew@...n.ch>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"UNGLinuxDriver@...rochip.com" <UNGLinuxDriver@...rochip.com>,
"davem@...emloft.net" <davem@...emloft.net>,
"kuba@...nel.org" <kuba@...nel.org>
Subject: Re: [PATCH net-next] net: lan966x: Improve the CPU TX bitrate.
The 03/09/2022 09:57, David Laight wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> From: 'Horatiu Vultur'
> > Sent: 09 March 2022 09:11
> >
> > The 03/08/2022 22:46, David Laight wrote:
> > >
> > > From: Horatiu Vultur
> > > > Sent: 08 March 2022 22:30
> > > >
> > > > The 03/08/2022 22:36, Andrew Lunn wrote:
> > > > >
> > > > > > static int lan966x_port_inj_ready(struct lan966x *lan966x, u8 grp)
> > > > > > {
> > > > > > - u32 val;
> > > > > > + unsigned long time = jiffies + usecs_to_jiffies(READL_TIMEOUT_US);
> > > > > > + int ret = 0;
> > > > > >
> > > > > > - return readx_poll_timeout_atomic(lan966x_port_inj_status, lan966x, val,
> > > > > > - QS_INJ_STATUS_FIFO_RDY_GET(val) & BIT(grp),
> > > > > > - READL_SLEEP_US, READL_TIMEOUT_US);
> > > > > > + while (!(lan_rd(lan966x, QS_INJ_STATUS) &
> > > > > > + QS_INJ_STATUS_FIFO_RDY_SET(BIT(grp)))) {
> > > > > > + if (time_after(jiffies, time)) {
> > > > > > + ret = -ETIMEDOUT;
> > > > > > + break;
> > > > > > + }
> > > > >
> > > > > Did you try setting READL_SLEEP_US to 0? readx_poll_timeout_atomic()
> > > > > explicitly supports that.
> > > >
> > > > I have tried but it didn't improve. It was the same as before.
> > >
> > > How many times round the loop is it going ?
> >
> > In the tests that I have done, I have never seen entering in the loop.
>
> In which case I'd do an initial status check before even
> faffing with 'jiffies'.
That is a good idea. I will do this change in the next version.
>
> It might even be that the status read is so slow that space
> is always available by the time it is processed.
> PCIe reads can be horribly slow.
> Into our fgpa they end up being slower than old ISA bus cycles.
> Probably several thousand cpu clocks.
>
> David
>
> -
> Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
> Registration No: 1397386 (Wales)
--
/Horatiu
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