[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CABgGipUd67TSoPz3eeKf2kXzzwy8NWJMkGYtkikdcBKiaJd8Bg@mail.gmail.com>
Date: Thu, 17 Mar 2022 18:02:35 +0800
From: Andy Chiu <andy.chiu@...ive.com>
To: davem@...emloft.net, kuba@...nel.org, michal.simek@...inx.com,
linux@...linux.org.uk, Robert Hancock <robert.hancock@...ian.com>,
andrew@...n.ch, netdev@...r.kernel.org, devicetree@...r.kernel.org,
radhey.shyam.pandey@...inx.com
Cc: Greentime Hu <greentime.hu@...ive.com>
Subject: Re: [PATCH v2 1/2] dt-bindings: net: xilinx_axienet: add pcs-handle attribute
loop in: radhey.shyam.pandey@...inx.com
On Thu, Mar 17, 2022 at 5:21 PM Andy Chiu <andy.chiu@...ive.com> wrote:
>
> Document the new pcs-handle attribute to support connecting to an
> external PHY in SGMII or 1000Base-X modes through the internal PCS/PMA
> PHY.
>
> Signed-off-by: Andy Chiu <andy.chiu@...ive.com>
> Reviewed-by: Greentime Hu <greentime.hu@...ive.com>
> ---
> Documentation/devicetree/bindings/net/xilinx_axienet.txt | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> index b8e4894bc634..2a9a3a90eb63 100644
> --- a/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> +++ b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> @@ -68,6 +68,11 @@ Optional properties:
> required through the core's MDIO interface (i.e. always,
> unless the PHY is accessed through a different bus).
>
> + - pcs-handle: Phandle to the internal PCS/PMA PHY, if a fixed external PHY
> + is tied to it in SGMII or 1000Base-X modes. This is not
> + required for SFP connection. The driver would use phy-handle
> + to reference the PCS/PMA PHY in such case.
> +
> Example:
> axi_ethernet_eth: ethernet@...00000 {
> compatible = "xlnx,axi-ethernet-1.00.a";
> --
> 2.34.1
>
Powered by blists - more mailing lists