netdev - Re: FEC MDIO read timeout on linkup

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Date:   Mon, 2 May 2022 20:25:12 +0200
From:   Francesco Dolcini <francesco.dolcini@...adex.com>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Francesco Dolcini <francesco.dolcini@...adex.com>,
        netdev@...r.kernel.org, Andy Duan <fugang.duan@....com>,
        Joakim Zhang <qiangqing.zhang@....com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Russell King <linux@...linux.org.uk>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        "David S. Miller" <davem@...emloft.net>,
        Fabio Estevam <festevam@...il.com>,
        Tim Harvey <tharvey@...eworks.com>,
        Chris Healy <cphealy@...il.com>
Subject: Re: FEC MDIO read timeout on linkup

On Mon, May 02, 2022 at 08:21:10PM +0200, Andrew Lunn wrote:
> > Could it be that the issue is writing the MSCR in fec_restart(),
> > `writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED)`?
> > 
> > I do see the issue on link up/down event, when this function is actually
> > called.
> > 
> > >From what I can understand from the previous history:
> > 
> >   1e6114f51f9d (net: fec: fix MDIO probing for some FEC hardware blocks, 2020-10-28) 
> >   f166f890c8f0 (net: ethernet: fec: Replace interrupt driven MDIO with polled IO, 2020-05-02)
> > 
> > writing to this register could trigger a FEC_ENET_MII interrupt actually
> > creating a race condition with fec_enet_mdio_read() that is called on
> > link change also.
> 
> You should read the discussion from when this code was added.

Of course, I did it.

> Are you planning on adding:
> 
>        if (fep->quirks & FEC_QUIRK_CLEAR_SETUP_MII) {
>                 /* Clear MMFR to avoid to generate MII event by writing MSCR.
>                  * MII event generation condition:
>                  * - writing MSCR:
>                  *      - mmfr[31:0]_not_zero & mscr[7:0]_is_zero &
>                  *        mscr_reg_data_in[7:0] != 0
>                  * - writing MMFR:
>                  *      - mscr[7:0]_not_zero
>                  */
>                 writel(0, fep->hwp + FEC_MII_DATA);
>         }
> 
> To other locations which change FEC_MII_SPEED?

Correct, plus the required locking since both fec_enet_mdio_read() and
_write() do write into the same registers.

Francesco