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Message-ID: <YnBcE96wbQxZguw2@robh.at.kernel.org>
Date: Mon, 2 May 2022 17:32:51 -0500
From: Rob Herring <robh@...nel.org>
To: Nathan Rossi <nathan@...hanrossi.com>
Cc: netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Andrew Lunn <andrew@...n.ch>,
Vivien Didelot <vivien.didelot@...il.com>,
Florian Fainelli <f.fainelli@...il.com>,
Vladimir Oltean <olteanv@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Subject: Re: [PATCH 1/2] dt-bindings: net: dsa: marvell: Add
single-chip-address property
On Sat, Apr 23, 2022 at 01:14:27PM +0000, Nathan Rossi wrote:
> Some Marvell DSA devices can be accessed in a single chip addressing
> mode. This is currently configured by setting the address of the switch
> to 0. However switches in this configuration do not respond to address
> 0, only responding to higher addresses (fixed addressed based on the
> switch model) for the individual ports/etc. This is a feature to allow
> for other phys to exist on the same mdio bus.
>
> This change defines a 'single-chip-address' property in order to
> explicitly define that the chip is accessed in this mode. This allows
> for a switch to have an address defined other than 0, so that address
> 0 can be used for another mdio device.
>
> Signed-off-by: Nathan Rossi <nathan@...hanrossi.com>
> ---
> Documentation/devicetree/bindings/net/dsa/marvell.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/dsa/marvell.txt b/Documentation/devicetree/bindings/net/dsa/marvell.txt
> index 2363b41241..5c7304274c 100644
> --- a/Documentation/devicetree/bindings/net/dsa/marvell.txt
> +++ b/Documentation/devicetree/bindings/net/dsa/marvell.txt
> @@ -46,6 +46,8 @@ Optional properties:
> - mdio? : Container of PHYs and devices on the external MDIO
> bus. The node must contains a compatible string of
> "marvell,mv88e6xxx-mdio-external"
> +- single-chip-address : Device is configured to use single chip addressing
> + mode.
Doesn't sound like a common feature, it needs a vendor prefix.
Some of the commit message explanation of what 'single chip addressing'
is is needed here.
Rob
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